ZHCSCO9B June 2014 – January 2018 LM46001
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Fixed-Frequency, Peak-Current Mode Controlled Step-Down Regulator
- 7.3.2 Light Load Operation
- 7.3.3 Adjustable Output Voltage
- 7.3.4 Enable (ENABLE)
- 7.3.5 VCC, UVLO, and BIAS
- 7.3.6 Soft-Start and Voltage Tracking (SS/TRK)
- 7.3.7 Switching Frequency (RT) and Synchronization (SYNC)
- 7.3.8 Minimum ON-Time, Minimum OFF-Time and Frequency Foldback at Dropout Conditions
- 7.3.9 Internal Compensation and CFF
- 7.3.10 Bootstrap Voltage (CBOOT)
- 7.3.11 Power Good (PGOOD)
- 7.3.12 Overcurrent and Short-Circuit Protection
- 7.3.13 Thermal Shutdown
- 7.4 Device Functional Modes
-
8 Applications and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Custom Design With WEBENCH? Tools
- 8.2.2.2 Output Voltage Setpoint
- 8.2.2.3 Switching Frequency
- 8.2.2.4 Input Capacitors
- 8.2.2.5 Inductor Selection
- 8.2.2.6 Output Capacitor Selection
- 8.2.2.7 Feed-Forward Capacitor
- 8.2.2.8 Bootstrap Capacitors
- 8.2.2.9 VCC Capacitor
- 8.2.2.10 BIAS Capacitors
- 8.2.2.11 Soft-Start Capacitors
- 8.2.2.12 Undervoltage Lockout Setpoint
- 8.2.2.13 PGOOD
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- PWP|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- PWP|16
訂購信息
10.1.1 Compact Layout for EMI Reduction
Radiated EMI is generated by the high di/dt components in pulsing currents in switching converters. The larger area covered by the path of a pulsing current, the more electromagnetic emission is generated. The key to minimize radiated EMI is to identify the pulsing current path and minimize the area of the path. In Buck converters, the pulsing current path is from the VIN side of the input capacitors to HS switch, to the LS switch, and then return to the ground of the input capacitors, as shown in Figure 100.
Figure 100. Buck Converter High di / dt PathHigh-frequency ceramic bypass capacitors at the input side provide primary path for the high di/dt components of the pulsing current. Placing ceramic bypass capacitor(s) as close as possible to the VIN and PGND pins is the key to EMI reduction.
The SW pin connecting to the inductor must be as short as possible and just wide enough to carry the load current without excessive heating. Use short, thick traces or copper pours (shapes) for high current conduction path to minimize parasitic resistance. Place the output capacitorsclose to the VOUT end of the inductor and closely grounded to PGND pin and exposed PAD.
Place the bypass capacitors on VCC and BIAS pins as close as possible to the pins respectively and closely grounded to PGND and the exposed PAD.