ZHCSLO7B December 2020 – January 2023 LM25149-Q1
PRODUCTION DATA
The LM25149-Q1 contains an internal high-voltage VCC bias regulator that provides the bias supply for the PWM controller and the gate drivers for the external MOSFETs. The input voltage pin (VIN) can be connected directly to an input voltage source up to 42 V. However, when the input voltage is below the VCC setpoint level, the VCC voltage tracks VIN minus a small voltage drop.
The VCC regulator output current limit is 115 mA (minimum). At power up, the controller sources current into the capacitor connected at the VCC pin. When the VCC voltage exceeds 3.3 V and the EN pin is connected to a voltage greater than 1 V, the soft-start sequence begins. The output remains active unless the VCC voltage falls below the VCC UVLO falling threshold of 3.1 V (typical) or EN is switched to a low state. Connect a ceramic capacitance from VCC to PGND. The recommended range of the VCC capacitor is from 2.2 μF to 10 μF.
An internal 5-V linear regulator generates the VDDA bias supply. Bypass VDDA with a 100-nF ceramic capacitor or higher to achieve a low-noise internal bias rail. Normally, VDDA is 5 V. However, there is one condition where VDDA regulates at 3.3 V: this is in PFM mode with a light or no load on the output.
Minimize the internal power dissipation of the VCC regulator by connecting VCCX to a 5-V output or to an external 5-V supply. If the VCCX voltage is above 4.3 V, VCCX is internally connected to VCC and the internal VCC regulator is disabled. Tie VCCX to PGND if it is unused. Do not connect VCCX to a voltage greater than 6.5 V. If using active EMI filter with AEFVDDA powered from VCC, do not connect VCCX to a voltage greater than 5.5 V. If an external supply is connected to VCCX to power the LM25149-Q1, VIN must be greater than the external bias voltage during all conditions to avoid damage to the controller.