ZHCSDM9A December 2014 – March 2018 LDC1612 , LDC1614
PRODUCTION DATA.
The LDC1612/LDC1614 provides a configurable conversion time by setting an internal register. The conversion interval can be configured across a range of 1.2 µs to >26.2 ms with 16 bits of resolution. Note that it is possible to configure the conversion interval to be significantly shorter than the time required to readback the DATAx registers; when configured in this manner, older conversions for a channel are overwritten when new conversion data is completed for each channel. The conversion interval is set in multiples of the reference clock period by setting the RCOUNTx register value. The conversion time for any channel x is:
In general, a longer conversion time will provide a higher resolution inductance measurement. The maximum setting, 0xFFFF, is required for full resolution. The reference count value should be chosen to support both the required sample rate and the necessary resolution. Refer to the TI Application Note Optimizing L Measurement Resolution for the LDC161x and LDC1101 for more information.
| CHANNEL | REGISTER | FIELD | CONVERSION TIME |
|---|---|---|---|
| 0 | RCOUNT0, addr 0x08 | RCOUNT0 [15:0] | (RCOUNT0×16)/fREF0 |
| 1 | RCOUNT1, addr 0x09 | RCOUNT1 [15:0] | (RCOUNT1×16)/fREF1 |
| 2 | RCOUNT2, addr 0x0A | RCOUNT2 [15:0] | (RCOUNT2×16)/fREF2 |
| 3 | RCOUNT3, addr 0x0B | RCOUNT3 [15:0] | (RCOUNT3×16)/fREF3 |
The typical channel switch delay time between the end of conversion and the beginning of sensor activation of the subsequent channel is:
The deterministic conversion time of the LDC allows data polling at a fixed interval. A data ready flag (DRDY) can assert the INTB pin for use in interrupt driven system designs (see the STATUS register description in Register Maps).