The ISOW7841A-Q1 has built-in UVLO on the V_CC and V_ISO supplies with positive-going and negative-going thresholds and hysteresis. When the V_CC voltage crosses the positive-going UVLO threshold during power-up, the DC-DC converter initializes and the power converter duty cycle is increased in a controlled manner. This soft-start scheme limits primary peak currents drawn from the V_CC supply and charges the V_ISO output in a controlled manner, avoiding overshoots. Outputs of the isolated data channels are in an indeterminate state until the V_CC or V_ISO voltage crosses the positive-going UVLO threshold. When the UVLO positive-going threshold is crossed on the secondary side V_ISO pin, the feedback data channel starts providing feedback to the primary controller. The regulation loop takes over and the isolated data channels go to the normal state defined by the respective input channels or their default states. Design should consider a sufficient time margin (typically 10 ms with 10-μF load capacitance) to allow this power up sequence before valid data channels are accounted for system functionality.

When V_CC power is lost, the primary side DC-DC controller turns off when the UVLO lower threshold is reached. The V_ISO capacitor then discharges depending on the external load. The isolated data outputs on the V_ISO side are returned to the default state for the brief time that the V_ISO voltage takes to discharge to zero.