ZHCSNF0B May 2018 – October 2021 ISOW1412 , ISOW1432
PRODMIX
Table 10-1 lists the supply configuration for these devices:
| INPUTS | OUTPUT | |||
|---|---|---|---|---|
| VDD(1) | VIO | EN/FLT | MODE | VISOOUT(3) |
| < VDD(UVLO+) | >VIO(UVLO+) | H or Open | X | OFF |
| >VDD(UVLO+) | <VIO(UVLO+) | X | Invalid Operation | |
| 5 V | 1.71 V to 5.5 V | High(shorted to VISOOUT) | 5 V | |
| 5 V or 3.3 V | 1.71 V to 5.5 V | Low(shorted to GND2) or floating (2) | 3.3 V | |
| 3.3 V | 1.71 V to 5.5 V | High(shorted to VISOOUT) | Invalid Operation | |
| X | X | L | X | OFF |
Table 10-2 shows the driver functional modes:
| INPUTS | OUTPUTS(3) | |||||
|---|---|---|---|---|---|---|
| VDD(1) | VIO | EN/FLT | D | DE | Y, A | Z, B |
| PU | PU | H or Open | H | H | H | L |
| L | H | L | H | |||
| X | L | Hi-Z | Hi-Z | |||
| X | Open | Hi-Z | Hi-Z | |||
| Open | H | H | L | |||
| L | X | X | Hi-Z | Hi-Z | ||
| PD | PU | X | X | X | Hi-Z | Hi-Z |
| PU | PD(2) | X | X | X | Invalid Operation | |
When the driver enable pin, DE, is logic high, the differential outputs, Y and Z, follow the logic states at data input, D. A logic high at the D input causes the Y output to go high and the Z output to go low. Therefore the differential output voltage defined by Equation 1 is positive.
A logic low at the D input causes the Z output to go high and the Y output to go low. Therefore the differential output voltage defined by Equation 1 is negative. A logic low at the DE input causes both outputs to go to the high-impedance (Hi-Z) state. The logic state at the D pin is irrelevant when the DE input is logic low. The DE pin has an internal pulldown resistor to ground. The driver is disabled (bus outputs are in the Hi-Z) by default when the DE pin is left open. The D pin has an internal pullup resistor. The Y output goes high and the Z output goes low when the D pin is left open while the driver enabled.
Table 10-3 shows the receiver functional modes:
| INPUTS | OUTPUT | ||||
|---|---|---|---|---|---|
| VDD(1) | VIO | EN/FLT | Differential Input VID = VA- VB | RE | R (3) |
| PU | PU | H or Open | VID > VIT+ | L | H |
| VIT- < VID < VIT+ | L | Indeterminate | |||
| VID < VIT- | L | L | |||
| X | H | Hi-Z | |||
| X | Open | Hi-Z | |||
| Open, Short, Idle | L | H | |||
| L | X | X | H | ||
| PD | PU | X | X | X | Hi-Z |
| PU | PD(2) | H or Open | X | X | Invalid Operation |
| L | X | X | |||
The receiver is enabled when the receiver enable pin, RE, is logic low. The receiver output, R, goes high when the differential input voltage defined by Equation 2 is greater than the positive input threshold, VTH+.
The receiver output, R, goes low when the differential input voltage defined by Equation 2 is less than the negative input threshold, VTH– . If the VID voltage is between the VTH+ and VTH– thresholds, the output is indeterminate. The receiver output is in the Hi-Z state and the magnitude and polarity of VID are irrelevant when the RE pin is logic high or left open. The internal biasing of the receiver inputs causes the output to go to a failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not actively driven (idle bus).
Other device feature functional states in shown in Table 10-4 and Table 10-5 below:
| INPUTS | OUTPUT | ||
|---|---|---|---|
| VDD | VIO | EN/FLT | VISOOUT |
| PU | PU | H or Open | 3.3 V or 5 V depending on MODE pin setting |
| PU | PU | L | OFF |
| INPUTS | OUTPUT | Comments | |||
|---|---|---|---|---|---|
| VDD(1)(2) | VIO | EN/FLT | IN | OUT | |
| PU | PU | H or Open | H | H | Output channel assumes logic state governed by IN |
| L | L | ||||
| Open | L | Default state | |||
| L | X | Hi-Z | Device is in disabled state when either of VDD or VIO is missing | ||
| PD | PU | X | X | Hi-Z | |
| PU | PD | X | X | Invalid Operation | |