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ZHCST92A October 2023 – June 2024 ISOTMP35-Q1

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

DFQ|7
- MPSS165

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

5.5 Insulation Specification

Over free-air temperature range and V_DD = 2.3V to 5.5V (unless otherwise noted); Typical specifications are at T_A = 25°C and V_DD = 3.3V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	VALUE	UNIT
GENERAL
CLR	External Clearance⁽¹⁾	Shortest terminal-to-terminal distance through air	>4	mm
CPG	External Creepage⁽¹⁾	Shortest terminal-to-terminal distance across the package surface	>4	mm
DTI	Distance through the insulation	Minimum internal gap (internal clearance)	>17	μm
CTI	Comparative tracking index	DIN EN 60112; IEC 60112	>400	V
	Material Group		II
	Overvoltage category	Rated mains voltage ≤ 150V_RMS	I-IV
	Overvoltage category	Rated mains voltage ≤ 300V_RMS	I-III
DIN EN IEC 60747-17 (VDE 0884-17)
V_IORM	Maximum repetitive peak isolation voltage	At AC voltage	707	V_PK
V_IOWM	Maximum-rated isolation working voltage	At AC voltage (sine wave)	500	V_RMS
V_IOWM	Maximum-rated isolation working voltage	At DC voltage	707	V_DC
V_IOTM	Maximum transient isolation voltage	V_TEST = V_IOTM, t = 60s (qualification test), V_TEST = 1.2 × V_IOTM, t = 1s (100% production test)	4250	V_PK
V_IMP	Maximum impulse voltage⁽²⁾	Tested in air, 1.2/50-μs waveform per IEC 62368-1	5000	V_PK
V_IOSM	Maximum surge isolation voltage⁽³⁾	Tested in oil (qualification test), 1.2/50-μs waveform per IEC 62368-1	6500	V_PK
q_pd	Apparent charge⁽⁴⁾	Method a, after input/output safety test subgroups 2 and 3, V_pd(ini) = V_IOTM, t_ini = 60s, V_pd(m) = 1.2 × V_IORM, t_m = 10s	≤ 5	pC
		Method a, after environmental tests subgroup 1, V_pd(ini) = V_IOTM, t_ini = 60s, V_pd(m) = 1.3 × V_IORM, t_m = 10s	≤ 5
		Method b1, at preconditioning (type test) and routine test, V_pd(ini) = V_IOTM, t_ini = 1s, V_pd(m) = 1.5 × V_IORM, t_m = 1s	≤ 5
		Method b2, at routine test (100% production)⁽⁶⁾, V_pd(ini) = V_IOTM = V_pd(m); t_ini = t_m = 1s	≤ 5
C_IO	Barrier capacitance, input to output⁽⁵⁾	V_IO = 0.1V_PP at 100kHz	1.4	pF
R_IO	Insulation resistance, input to output⁽⁵⁾	V_IO = 500V at T_A = 25°C	>10¹²	?
		V_IO = 500V at 100°C ≤ T_A ≤ 125°C	>10¹¹
		V_IO = 500V at T_A = 150°C	>10⁹
	Pollution degree		2
	Climatic category		55/125/21
UL1577
V_ISO	Withstand isolation voltage	V_TEST = V_ISO, t = 60s (qualification); V_TEST = 1.2 × V_ISO, t = 1s (100% production)	3000	V_RMS

(1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Take care to maintain the creepage and clearance distance of the board design to make sure that the mounting pads of the isolator on the printed circuit board do not reduce this distance. Creepage and clearance on a printed circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.

(2) Testing is carried out in air to determine the surge immunity of the isolation barrier.

(3) Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier.

(4) Apparent charge is electrical discharge caused by a partial discharge (pd).

(5) All pins on each side of the barrier tied together creating a two-terminal device.

(6) Either method b1 or b2 is used in production.