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ZHCSMV7B February 2020 – May 2021 ISO1640 , ISO1641

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

D|8
- MSOI002K
DW|16
- MSOI003I

散熱焊盤機械數據 (封裝 | 引腳)

DW|16
- QFND505A

訂購信息

6.12 I2C Switching Characteristics

over recommended operating conditions, unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
2.25 V ≤ V_CC2 ≤ 2.75 V, 3 V ≤ V_CC1 ≤ 3.6 V
t_f2	Output signal fall time (SDA2 and SCL2)	0.7 × V_CC2 ≥ V_O ≥ 0.3 × V_CC2, R2 = 72 Ω, C2 = 400 pF, see Figure 7-1	16	26.5	40	ns
t_f2	Output signal fall time (SDA2 and SCL2)	0.9 × V_CC2 ≥ V_O ≥ 400 mV, R2 = 72Ω, C2 = 400 pF, see Figure 7-1	38	53.3	78	ns
t_pLH1-2	Low-to-high propagation delay, side 1 to side 2	V_I = 535 mV, V_O = 0.7 × V_CC2, R1 = 953 Ω, R2 = 72 Ω, C1 and C2 = 10 pF, V_CC1 = 3.3 V, see Figure 7-1		20	30	ns
t_pHL1-2	High-to-low propagation delay, side 1 to side 2	V_I = 550 mV, V_O = 0.3 × V_CC2, R1 = 953 Ω, R2 = 72 Ω, C1 and C2 = 10 pF, V_CC1 = 3.3 V, see Figure 7-1		80	130	ns
t_pLH2-1	Low-to-high propagation delay, side 2 to side 1⁽¹⁾	V_I = 0.4 x V_CC2, V_O = 0.7 x V_CC1, R1 = 953 Ω, R2 = 72 Ω, C1 and C2 = 10 pF, V_CC1 = 3.3 V, see Figure 7-1		40	48	ns
t_pHL2-1	High-to-low propagation delay, side 2 to side 1⁽¹⁾	V_I = 0.4 x V_CC2, V_O = 0.3 × V_CC1, R1 = 953 Ω, R2 = 72 Ω, C1 and C2 = 10 pF, V_CC1 = 3.3 V, see Figure 7-1		70	100	ns
PWD_1-2	Pulse width distortion \|t_pHL1-2 – t_pLH1-2\|	R1 = 953 Ω, R2 = 72 Ω, C1 and C2 = 10 pF, V_CC1 = 3.3 V see Figure 7-1		60	104	ns
PWD_2-1	Pulse width distortion⁽¹⁾ \|t_pHL2-1 – t_pLH2-1\|	R1 = 953 Ω, R2 = 72 Ω, C1 and C2 = 10 pF, V_CC1 = 3.3 V see Figure 7-1		25	55	ns
t_LOOP1	Round-trip propagation delay on side 1⁽¹⁾	0.4 V ≤ V_I≤ 0.3 × V_CC1, R1 = 953 Ω, C1 = 40 pF, R2 = 72 Ω, C2 = 400 pF, see Figure 7-1		62	74	ns
3 V ≤ V_CC1, V_CC2 ≤ 3.6 V
t_f1	Output signal fall time (SDA1 and SCL1)	0.7 × V_CC1 ≥ V_O ≥ 0.3 × V_CC1, R1 = 953 Ω, C1 = 40 pF, R2 = 95.3 Ω, C2 = 400 pF, see Figure 7-1	8	17	29	ns
t_f1	Output signal fall time (SDA1 and SCL1)	0.9 × V_CC1 ≥ V_O ≥ 900 mV, R1 = 953 Ω, C1 = 40 pF, see Figure 7-1	15	25	48	ns
t_f2	Output signal fall time (SDA2 and SCL2)	0.7 × V_CC2 ≥ V_O ≥ 0.3 × V_CC2, R2 = 95.3 Ω, C2 = 400 pF, see Figure 7-1	14	23	47	ns
t_f2	Output signal fall time (SDA2 and SCL2)	0.9 × V_CC2 ≥ V_O ≥ 400 mV, R2 = 95.3 Ω, C2 = 400 pF, see Figure 7-1	30	50	100	ns
t_pLH1-2	Low-to-high propagation delay, side 1 to side 2	V_I = 535 mV, V_O = 0.7 × V_CC2, R1 = 953 Ω, R2 = 95.3 Ω, C1 and C2 = 10 pF, see Figure 7-1		21	29	ns
t_pHL1-2	High-to-low propagation delay, side 1 to side 2	V_I = 550 mV, V_O = 0.3 × V_CC2, R1 = 953 Ω, R2 = 95.3 Ω, C1 and C2 = 10 pF, see Figure 7-1		59	88	ns
t_pLH2-1	Low-to-high propagation delay, side 2 to side 1⁽¹⁾	V_I = 0.4 x V_CC2, V_O = 0.7 x V_CC1, R1 = 953 Ω, R2 = 95.3 Ω, C1 and C2 = 10 pF, see Figure 7-1		40	47	ns
t_pHL2-1	High-to-low propagation delay, side 2 to side 1⁽¹⁾	V_I = 0.4 x V_CC2, V_O = 0.3 × V_CC1, R1 = 953 Ω, R2 = 95.3 Ω, C1 and C2 = 10 pF, see Figure 7-1		70	100	ns
PWD_1-2	Pulse width distortion \|t_pHL1-2 – t_pLH1-2\|	R1 = 953 Ω, R2 = 95.3 Ω, C1 and C2 = 10 pF, see Figure 7-1		39	61	ns
PWD_2-1	Pulse width distortion⁽¹⁾ \|t_pHL2-1 – t_pLH2-1\|	R1 = 953 Ω, R2 = 95.3 Ω, C1 and C2 = 10 pF, see Figure 7-1		25	48	ns
t_LOOP1	Round-trip propagation delay on side 1⁽¹⁾	0.4 V ≤ V_I≤ 0.3 × V_CC1, R1 = 953 Ω, C1 = 40 pF, R2 = 95.3 Ω, C2 = 400 pF, see Figure 7-1		65	78	ns
4.5 V ≤ V_CC1, V_CC2 ≤ 5.5 V
t_f1	Output signal fall time (SDA1 and SCL1)	0.7 × V_CC1 ≥ V_O ≥ 0.3 × V_CC1, R1 = 1430 Ω, C1 = 40 pF, R2 = 95.3 Ω, C2 = 400 pF, see Figure 7-1	6	16	22	ns
t_f1	Output signal fall time (SDA1 and SCL1)	0.9 × V_CC1 ≥ V_O ≥ 900 mV, R1 = 1430 Ω, C1 = 40 pF, see Figure 7-1	13	32	48	ns
t_f2	Output signal fall time (SDA2 and SCL2)	0.7 × V_CC2 ≥ V_O ≥ 0.3 × V_CC2, R2 = 143 Ω, C2 = 400 pF, see Figure 7-1	10	24	30	ns
t_f2	Output signal fall time (SDA2 and SCL2)	0.9 × V_CC2 ≥ V_O ≥ 400 mV, R2 = 143 Ω, C2 = 400 pF, see Figure 7-1	28	48	76	ns
t_pLH1-2	Low-to-high propagation delay, side 1 to side 2	V_I = 535 mV, V_O = 0.7 × V_CC2, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Figure 7-1		21	28	ns
t_pHL1-2	High-to-low propagation delay, side 1 to side 2	V_I = 550 mV, V_O = 0.3 × V_CC2, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Figure 7-1		51	70	ns
t_pLH2-1	Low-to-high propagation delay, side 2 to side 1⁽¹⁾	V_I = 0.4 x V_CC2, V_O = 0.7 x V_CC1, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Figure 7-1		51	57	ns
t_pHL2-1	High-to-low propagation delay, side 2 to side 1⁽¹⁾	V_I = 0.4 x V_CC2, V_O = 0.3 × V_CC1, R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Figure 7-1		60	88	ns
PWD_1-2	Pulse width distortion \|t_pHL1-2 – t_pLH1-2\|	R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Figure 7-1		30	45	ns
PWD_2-1	Pulse width distortion⁽¹⁾ \|t_pHL2-1 – t_pLH2-1\|	R1 = 1430 Ω, R2 = 143 Ω, C1 and C2 = 10 pF, see Figure 7-1		10	34	ns
t_LOOP1	Round-trip propagation delay on side 1⁽¹⁾	0.4 V ≤ V_I≤ 0.3 × V_CCI, R1 = 1430 Ω, C1 = 40 pF, R2 = 143 Ω, C2 = 400 pF, see Figure 7-1		84	96	ns

(1) This parameter does not apply to the SCL1 line of the ISO1641 device because it is unidirectional.