ZHCSIV2C September 2018 – September 2019 ISO1500
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| DRIVER ENABLED, RECEIVER DISABLED | |||||
| Logic-side supply current | VD = VCC1, VCC1 = 5 V ± 10% | 2.6 | 4.4 | mA | |
| Logic-side supply current | VD = VCC1, VCC1 = 3.3 V ± 10% | 2.6 | 4.4 | mA | |
| Logic-side supply current | D = 1Mbps square wave with 50% duty cycle, VCC1 = 5 V ± 10% | 3.2 | 5.1 | mA | |
| Logic-side supply current | D = 1Mbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10% | 3.2 | 5.1 | mA | |
| DRIVER ENABLED, RECEIVER ENABLED | |||||
| Logic-side supply current | VRE = VGND1, VD = VCC1, VCC1 = 5 V ± 10% | 2.6 | 4.4 | mA | |
| Logic-side supply current | VRE = VGND1, VD = VCC1, VCC1 = 3.3 V ± 10% | 2.6 | 4.4 | mA | |
| Logic-side supply current | VRE = VGND1, D = 1Mbps square wave with 50% duty cycle, VCC1 = 5 V ± 10%, CL(R)(1) = 15 pF | 3.4 | 5.2 | mA | |
| Logic-side supply current | VRE = VGND1, D= 1Mbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10%, CL(R)(1) = 15 pF | 3.2 | 5.2 | mA | |
| DRIVER DISABLED, RECEIVER ENABLED | |||||
| Logic-side supply current | V(A-B) ≥ 200 mV, VD = VCC1, VCC1 = 5 V ± 10% | 1.5 | 3.1 | mA | |
| Logic-side supply current | V(A-B) ≥ 200 mV, VD = VCC1, VCC1 = 3.3 V ± 10% | 1.5 | 3.1 | mA | |
| Logic-side supply current | (A-B) =1Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5 V ± 10%, CL(R)(1) = 15 pF | 1.7 | 3.2 | mA | |
| Logic-side supply current | (A-B) = 1Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3 V ± 10%, CL(R)(1) = 15 pF | 1.7 | 3.2 | mA | |
| DRIVER DISABLED, RECEIVER DISABLED | |||||
| Logic-side supply current | VDE = VGND1, VD = VCC1, VCC1 = 5 V ± 10% | 1.5 | 3.1 | mA | |
| Logic-side supply current | VDE = VGND1, VD = VCC1, VCC1 = 3.3 V ± 10% | 1.5 | 3.1 | mA | |