ZHCSIG1D August 2016 – September 2023 DS90UB960-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 DC Electrical Characteristics
- 6.6 AC Electrical Characteristics
- 6.7 CSI-2 Timing Specifications
- 6.8 Recommended Timing for the Serial Control Bus
- 6.9 Timing Diagrams
- 6.10 Typical Characteristics
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4
Device Functional Modes
- 7.4.1 CSI-2 Mode
- 7.4.2 RAW Mode
- 7.4.3 MODE Pin
- 7.4.4 REFCLK
- 7.4.5 Receiver Port Control
- 7.4.6 Input Jitter Tolerance
- 7.4.7 Adaptive Equalizer
- 7.4.8 Channel Monitor Loop-Through Output Driver
- 7.4.9 RX Port Status
- 7.4.10 Sensor Status
- 7.4.11 GPIO Support
- 7.4.12 RAW Mode LV / FV Controls
- 7.4.13 CSI-2 Protocol Layer
- 7.4.14 CSI-2 Short Packet
- 7.4.15 CSI-2 Long Packet
- 7.4.16 CSI-2 Data Identifier
- 7.4.17 Virtual Channel and Context
- 7.4.18 CSI-2 Mode Virtual Channel Mapping
- 7.4.19 CSI-2 Transmitter Frequency
- 7.4.20 CSI-2 Output Bandwidth
- 7.4.21 CSI-2 Transmitter Status
- 7.4.22 Video Buffers
- 7.4.23 CSI-2 Line Count and Line Length
- 7.4.24 FrameSync Operation
- 7.4.25
CSI-2 Forwarding
- 7.4.25.1 Best-Effort Round Robin CSI-2 Forwarding
- 7.4.25.2 Synchronized CSI-2 Forwarding
- 7.4.25.3 Basic Synchronized CSI-2 Forwarding
- 7.4.25.4 Line-Interleaved CSI-2 Forwarding
- 7.4.25.5 Line-Concatenated CSI-2 Forwarding
- 7.4.25.6 CSI-2 Replicate Mode
- 7.4.25.7 CSI-2 Transmitter Output Control
- 7.4.25.8 Enabling and Disabling CSI-2 Transmitters
- 7.5
Programming
- 7.5.1 Serial Control Bus
- 7.5.2 Second I2C Port
- 7.5.3 I2C Target Operation
- 7.5.4 Remote Target Operation
- 7.5.5 Remote Target Addressing
- 7.5.6 Broadcast Write to Remote Devices
- 7.5.7 I2C Controller Proxy
- 7.5.8 I2C Controller Proxy Timing
- 7.5.9 Interrupt Support
- 7.5.10 Error Handling
- 7.5.11 Timestamp – Video Skew Detection
- 7.5.12 Pattern Generation
- 7.5.13 FPD-Link BIST Mode
- 7.6 Register Maps
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RTD|64
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RTD|64
訂購信息
7.4.16 CSI-2 Data Identifier
The DS90UB960-Q1 MIPI CSI-2 protocol interface transmits the data identifier byte containing the values for the virtual channel ID (VC) and data type (DT) for the application specific payload data, as shown in Figure 7-10. The virtual channel ID is contained in the 2 MSBs of the data identifier byte and identify the data as directed to one of four virtual channels. The value of the data type is contained in the 6 LSBs of the data identifier byte. When partnered with a DS90UB935-Q1 or DS90UB953-Q1 serializer, the Data Type is passed through from the received CSI-2 packets. When partnered with a DS90UB933-Q1 or DS90UB913A-Q1 the received RAW mode data is converted to CSI-2 Tx packets with assigned data type and virtual channel ID.
DVP format serializer inputs must have discrete synchronization signals. When interfacing with DS90UB913A-Q1 or DS90UB933-Q1 serializers, the DS90UB960-Q1 utilizes the HSYNC and VSYNC inputs to construct the MIPI CSI-2 Tx data packets. When paired with a DVP serializer, the DS90UB960-Q1 deserializer supports RAW8, RAW10 or RAW12 as well as formats which have the same pixel packing as RAW8, RAW10 or RAW12 such as YUV-422.
For each RX Port, register defines with which channel and data type the context is associated:
- For FPD Receiver port operating in RAW input mode connected to a DS90UB933-Q1 or DS90UB913A-Q1 serializer, register 0x70 describes RAW10 Mode and 0x71 RAW12 Mode.
- RAW1x_VC[7:6] field defines the associated virtual ID transported by the CSI-2 protocol from the camera sensor.
- RAW1x_ID[5:0] field defines the associated data type. The data type is a combination of the data type transported by the CSI-2 protocol.
Figure 7-10 CSI-2 Data Identifier Structure