Route CSI0_D*P/N and CSI1_D*P/N pairs with controlled 100-Ω differential impedance (±20%) or 50-Ω single-ended impedance (±15%).
Keep away from other high-speed signals.
Minimize intra-pair and inter-pair length
mismatch within a single CSI-2 TX Port (recommended <= 5 mils).
Length matching should be near the location of mismatch.
Each pair should be separated at least by 3 times the signal trace width.
Keep the use of bends in differential traces to a minimum. When bends are used, the number of left and right bends must be as equal as possible, and the angle of the bend should be ≥ 135 degrees. This arrangement minimizes any length mismatch caused by the bends and therefore minimizes the impact that bends have on EMI.
Route all differential pairs on the same layer.
Keep the number of VIAS to a minimum — TI recommends keeping the VIA count to 2 or fewer.
Keep traces on layers adjacent to ground plane.
Do NOT route differential pairs over any plane split.
Adding Test points causes impedance discontinuity and therefore negatively impacts signal performance. If test points are used, place them in series and symmetrically. Test points must not be placed in a manner that causes a stub on the differential pair.