ZHCSCR3C October 2012 – August 2014 DS125BR111
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 簡化電路原理圖
- 5 修訂歷史記錄
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械封裝和可訂購信息
10 Power Supply Recommendations
Two approaches are recommended to ensure that the DS125BR111 is provided with an adequate power supply. First, the supply (VDD) and ground (GND) Pins should be connected to power planes routed on adjacent layers of the printed circuit board. The layer thickness of the dielectric should be minimized so that the VDD and GND planes create a low inductance supply with distributed capacitance. Second, careful attention to supply bypassing through the proper use of bypass capacitors is required. A 0.1 μF bypass capacitor should be connected to each VDD Pin such that the capacitor is placed as close as possible to the DS125BR111. Smaller body size capacitors can help facilitate proper component placement. Additionally, capacitor with capacitance in the range of 1 μF to 10 μF should be incorporated in the power supply bypassing design as well. These capacitors can be either tantalum or an ultra-low ESR ceramic.
The DS125BR111 has an optional internal voltage regulator to provide the 2.5 V supply to the device. In 3.3 V mode operation, the VIN Pin = 3.3 V is used to supply power to the device. The internal regulator will provide the 2.5 V to the VDD Pins of the device and a 0.1 µF cap is needed at each of the 2 VDD Pins for power supply de-coupling (total capacitance should equal 0.2 µF). The VDD_SEL Pin must be tied to GND to enable the internal regulator. In 2.5 V mode operation, the VIN Pin should be left open and 2.5 V supply must be applied to the 2 VDD Pins to power the device. The VDD_SEL Pin must be left open (no connect) to disable the internal regulator.
Figure 11. 3.3 V or 2.5 V Supply Connection Diagram