ZHCSDP9D October 2011 – April 2015 DS110DF410
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 典型應用圖
- 5 修訂歷史記錄
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.5
Programming
- 8.5.1 SMBus Strap Observation
- 8.5.2 Device Revision and Device ID
- 8.5.3 Control/Shared Register Reset
- 8.5.4 Interrupt Channel Flag Bits
- 8.5.5 SMBus Master Mode Control Bits
- 8.5.6 Resetting Individual Channels of the Retimer
- 8.5.7 Interrupt Status
- 8.5.8 Overriding the CTLE Boost Setting
- 8.5.9 Overriding the VCO Search Values
- 8.5.10 Overriding the Output Multiplexer
- 8.5.11 Overriding the VCO Divider Selection
- 8.5.12 Using the PRBS Generator
- 8.5.13 Using the Internal Eye Opening Monitor
- 8.5.14 Overriding the DFE Tap Weights and Polarities
- 8.5.15 Enabling Slow Rise/Fall Time on the Output Driver
- 8.5.16 Inverting the Output Polarity
- 8.5.17 Overriding the Figure of Merit for Adaptation
- 8.5.18 Setting the Rate and Subrate for Lock Acquisition
- 8.5.19 Setting the Adaptation/Lock Mode
- 8.5.20 Initiating Adaptation
- 8.5.21 Setting the Reference Enable Mode
- 8.5.22 Overriding the CTLE Settings Used for CTLE Adaptation
- 8.5.23 Setting the Output Differential Voltage
- 8.5.24 Setting the Output De-Emphasis Setting
- 8.6 Register Maps
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
12 器件和文檔支持
12.1 器件支持
12.1.1 第三方產品免責聲明
TI 發布的與第三方產品或服務有關的信息，不能構成與此類產品或服務或保修的適用性有關的認可，不能構成此類產品或服務單獨或與任何 TI 產品或服務一起的表示或認可。
12.2 文檔支持
12.3 商標
All trademarks are the property of their respective owners.
12.4 靜電放電警告
這些裝置包含有限的內置 ESD 保護。 存儲或裝卸時，應將導線一起截短或將裝置放置于導電泡棉中，以防止 MOS 門極遭受靜電損傷。