SLVSB19D February 2012 – March 2015 DRV8834
PRODUCTION DATA.
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VM | Power supply voltage | –0.3 | 11.8 | V | |
| AVREF, BVREF, VINT, ADECAY, BDECAY |
Analog input pin voltage | –0.5 | 3.6 | V | |
| Digital input pin voltage | –0.5 | 7 | V | ||
| xISEN pin voltage | –0.3 | 0.5 | V | ||
| Peak motor drive output current, t < 1 µs | Internally limited | A | |||
| TJ | Operating virtual junction temperature | –40 | 150 | °C | |
| Tstg | Storage temperature | –60 | 150 | °C | |
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±4000 | V | |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1500 | ||||
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VM | Motor power supply voltage range(1) | 2.5 | 10.8 | V | |
| VREF | VREF input voltage range(2) | 1 | 2.1 | V | |
| IVINT | VINT external load current | 1 | mA | ||
| IVREF | VREF external load current | 400 | µA | ||
| VDIGIN | Digital input pin voltage range | –0.3 | 5.75 | V | |
| IOUT | Continuous RMS or DC output current per bridge(3) | 1.5 | A | ||
| THERMAL METRIC(1) | DRV8834 | UNIT | ||
|---|---|---|---|---|
| PWP [HTSSOP] | RGE [VQFN] | |||
| 24 PINS | 24 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 40.2 | 35.1 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 23.7 | 36.6 | |
| RθJB | Junction-to-board thermal resistance | 21.9 | 12.2 | |
| ψJT | Junction-to-top characterization parameter | 0.7 | 0.6 | |
| ψJB | Junction-to-board characterization parameter | 21.7 | 12.2 | |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.9 | 4 | |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWER SUPPLY | ||||||
| IVM | VM operating supply current | VM = 5 V, excluding winding current | 2.4 | 4 | mA | |
| VM = 10 V, excluding winding current | 2.75 | |||||
| IVMQ | VM sleep mode supply current | VM = 5 V | 0.6 | 2 | μA | |
| VM = 10 V | 9.6 | |||||
| VUVLO | VM undervoltage lockout voltage | VM falling | 2.39 | V | ||
| INTERNAL REGULATORS | ||||||
| VINT | VINT voltage | VM > 3.3 V, IOUT = 0 A to 1 mA | 2.85 | 3 | 3.15 | V |
| VREFO | VREF voltage | IOUT = 0 A to 400 µA | 1.9 | 2 | 2.1 | V |
| LOGIC-LEVEL INPUTS | ||||||
| VIL | Input low voltage | nSLEEP | 0.5 | V | ||
| All other digital input pins | 0.7 | |||||
| VIH | Input high voltage | nSLEEP | 2.5 | V | ||
| All other digital input pins | 2 | |||||
| VHYS | Input hysteresis | nSLEEP | 0.2 | V | ||
| All except nSLEEP | 0.4 | |||||
| RPD | Input pulldown resistance | nSLEEP | 500 | kΩ | ||
| All except nSLEEP, M0 | 200 | |||||
| IIL | Input low current | VIN = 0 | 1 | μA | ||
| IIN | Input current (M0) | -20 | 20 | µA | ||
| IIH | Input high current | VIN = 3.3 V, nSLEEP | 6.6 | 13 | μA | |
| VIN = 3.3 V, all except nSLEEP | 16.5 | 33 | ||||
| tDEG | Input deglitch time | 312 | 468 | ns | ||
| nFAULT OUTPUT (OPEN-DRAIN OUTPUT) | ||||||
| VOL | Output low voltage | IO = 5 mA | 0.5 | V | ||
| IOH | Output high leakage current | VO = 3.3 V | 1 | μA | ||
| H-BRIDGE FETs | ||||||
| RDS(ON) | HS FET ON-resistance | VM = 5 V, IO = 500 mA, TJ = 25°C | 160 | 250 | mΩ | |
| VM = 5 V, IO = 500 mA, TJ = 85°C | 190 | |||||
| VM = 2.7 V, IO = 500 mA, TJ = 25°C | 200 | 295 | ||||
| VM = 2.7 V, IO = 500 mA, TJ = 85°C | 240 | |||||
| LS FET ON-resistance | VM = 5 V, IO = 500 mA, TJ = 25°C | 145 | 240 | |||
| VM = 5 V, IO = 500 mA, TJ = 85°C | 180 | |||||
| VM = 2.7 V, IO = 500 mA, TJ = 25°C | 190 | 285 | ||||
| VM = 2.7 V, IO = 500 mA, TJ = 85°C | 235 | |||||
| IOFF | Off-state leakage current | –2 | 2 | μA | ||
| MOTOR DRIVER | ||||||
| fPWM | Current control PWM frequency | Internal PWM frequency | 42.5 | kHz | ||
| tBLANK | Current sense blanking time | VREF > 375 mV or DAC codes > 29% | 2.4 | µs | ||
| VREF < 375 mV or DAC codes < 29% | 1.6 | |||||
| tR | Rise time | VM = 5 V, 16 Ω to GND, 10% to 90% VM | 120 | ns | ||
| tF | Fall time | VM = 5 V, 16 Ω to GND, 10% to 90% VM | 100 | ns | ||
| PROTECTION CIRCUITS | ||||||
| IOCP | Overcurrent protection trip level | 2 | A | |||
| tOCP | Overcurrent protection period | VREF > 375 mV or DAC codes > 29% | 1.6 | µs | ||
| VREF < 375 mV or DAC codes < 29% | 1.1 | |||||
| tTSD | Thermal shutdown temperature | Die temperature | 150 | 160 | 180 | °C |
| CURRENT CONTROL | ||||||
| IREF | VREF input current | VREF = 3.3 V | –1 | 1 | µA | |
| VTRIP | xISEN trip voltage | For 100% current step | xVREF/5 | V | ||
| AISENSE | Current sense amplifier gain | Reference only | 5 | V/V | ||
| NO. | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| 1 | fSTEP | Step frequency | 250 | kHz | ||
| 2 | tWH(STEP) | Pulse duration, STEP high | 1.9 | µs | ||
| 3 | tWL(STEP) | Pulse duration, STEP low | 1.9 | µs | ||
| 4 | tSU(STEP) | Setup time, command to STEP rising | 200 | ns | ||
| 5 | tH(STEP) | Hold time, command to STEP rising | 1 | µs | ||
| 6 | tWAKE | Wake-up time, nSLEEP inactive to STEP | 1 | ms |
Figure 1. Timing Diagram



