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ZHCSQ30 December 2022 DRV8317

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

REE|36
- MPQF647

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

zhcsq30_oa

8.3.11 Protections

The DRV8317 is protected against VM, VIN_AVDD, AVDD, CP under voltage, VM over voltage, SPI fault, OTP read fault, FET over current and FET, LDO over temperature events. Table 8-6 summarizes various fault details.

Table 8-6 Fault Action and Response

FAULT	CONDITION	CONFIGURATION	REPORT	PRE-DRIVER	FAULT STATUS BITS	DIGITAL	RECOVERY
VM under voltage lockout (VM_UV)	V_VM < V_{UVLO (falling)}	UVP_MODE = 00b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY and V_VM > V_{UVLO (rising)}
VM under voltage lockout (VM_UV)	V_VM < V_{UVLO (falling)}	UVP_MODE = 01b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY and V_VM > V_{UVLO (rising)}
VM under voltage warning (VMUV_WARN)	V_VM < V_{VMUV_WARN_FALL}	VMUV_WARN_MODE = 00b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY and V_VM > V_{VMUV_WARN_RISE}
		VMUV_WARN_MODE = 01b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY and V_VM > V_{VMUV_WARN_RISE}
		VMUV_WARN_MODE = 10b	nFAULT	Active	Latched	Active	No action; report only mode
		VMUV_WARN_MODE = 11b	—	Active	—	Active	—
VIN_AVDD under voltage (VIN_AVDD_UV)	V_{VIN_AVDD} < V_{VIN_AVDD_UV (falling)}	—	—	Hi-Z	—	Reset	Automatic: V_{VIN_AVDD} > V_{VIN_AVDD_UV (rising)}
AVDD under voltage (AVDD_UV)	V_AVDD < V_{AVDD_UV (falling)}	—	—	Hi-Z	—	Reset	Automatic: V_AVDD > V_{AVDD_UV (rising)}
Charge pump under voltage (CP_UV)	V_CP < V_{CPUV (falling)}	UVP_MODE = 00b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY and V_CP > V_{CPUV (rising)}
Charge pump under voltage (CP_UV)	V_CP < V_{CPUV (falling)}	UVP_MODE = 01b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY and V_CP > V_{CPUV (rising)}
Over current protection (OCP)	I_PHASE > I_OCP	OCP_MODE = 000b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY
		OCP_MODE = 001b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY
		OCP_MODE = 010b	nFAULT	Hi-Z	Latched	Active	Latched: Cleared by FLT_CLR bit or nSLEEP reset pulse
		OCP_MODE = 011b	nFAULT	Active	Latched	Active	No action; report only mode
VM over voltage protection (VM_OV)	V_VM > V_{OVP (rising)}	OVP_MODE = 00b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY and V_VM < V_{OVP (falling)}
VM over voltage protection (VM_OV)	V_VM > V_{OVP (rising)}	OVP_MODE = 01b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY and V_VM < V_{OVP (falling)}
SPI fault (SPIFLT)	SCLK fault and ADDR fault	SPIFLT_MODE = 0b	nFAULT	Active	Latched	Active	No action; report only mode
SPI fault (SPIFLT)	SCLK fault and ADDR fault	SPIFLT_MODE = 1b	—	Active	—	Active	—
System (OTP read) (SYSFLT)	OTP read parity fault	—	nFAULT	Disabled	Latched	Active	Latched: Cleared by FLT_CLR bit or nSLEEP reset pulse
FET over temperature warning (OTW_FET)	T_J > T_{OTW_FET}	OTF_MODE = 00b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY and T_J < T_{OTW_FET} - T_{OTW_FET_HYS}
FET over temperature warning (OTW_FET)	T_J > T_{OTW_FET}	OTF_MODE = 01b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY and T_J < T_{OTW_FET} - T_{OTW_FET_HYS}
FET over temperature shutdown (OTS_FET)	T_J > T_{OTS_FET}	OTF_MODE = 00b	nFAULT	Hi-Z	Latched	Active	Automatic: SLOW_TRETRY and T_J < T_{OTS_FET} - T_{OTS_FET_HYS}
FET over temperature shutdown (OTS_FET)	T_J > T_{OTS_FET}	OTF_MODE = 01b	nFAULT	Hi-Z	Latched	Active	Automatic: FAST_TRETRY and T_J < T_{OTS_FET} - T_{OTS_FET_HYS}
AVDD LDO over temperature shutdown (OTS_LDO)	T_J > T_{OTS_LDO}	—	—	Hi-Z	—	Reset	Automatic: T_J < T_{OTS_LDO} - T_{OTS_LDO_HYS}