ZHCSQL7F May 2010 – May 2022 DRV8312 , DRV8332
PRODUCTION DATA
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| PVDD_X | Half bridge X (A, B, or C) DC supply voltage | 0 | 50 | 52.5 | V |
| GVDD_X | Supply for logic regulators and gate-drive circuitry | 10.8 | 12 | 13.2 | V |
| VDD | Digital regulator supply voltage | 10.8 | 12 | 13.2 | V |
| IO_PULSE | Pulsed peak current per output pin (could be limited by thermal) | 15 | A | ||
| IO | Continuous current per output pin (DRV8332) | 8 | A | ||
| FSW | PWM switching frequency | 500 | kHz | ||
| ROCP_CBC | OC programming resistor range in cycle-by-cycle current limit modes | 22 | 200 | kΩ | |
| ROCP_OCL | OC programming resistor range in OC latching shutdown modes | 19 | 200 | kΩ | |
| CBST | Bootstrap capacitor range | 33 | 220 | nF | |
| tON_MIN | Minimum PWM pulse duration, low side, for charging the Bootstrap capacitor | 50 | ns | ||
| TA | Operating ambient temperature | –40 | 85 | °C | |