ZHCSEC3F October 2015 – January 2025 DP83867CS , DP83867E , DP83867IS
PRODUCTION DATA
請參考 PDF 數據表獲取器件具體的封裝圖。
A global software restart is accomplished by setting bit 14 of register CTRL (0x001F) to 1. This action resets all the PHY circuits except the registers in the Register File.