8.3.1 Battery Parameter Measurements

The bq78z100 device measures cell voltage and current simultaneously, and also measures temperature to calculate the information related to remaining capacity, full charge capacity, state-of-health, and other gauging parameters.

8.3.2 Coulomb Counter (CC)

The first ADC is an integrating converter designed specifically for coulomb counting. The converter resolution is a function of its full-scale range and number of bits, yielding a 3.74-µV resolution.

8.3.3 CC Digital Filter

The CC digital filter generates a 16-bit conversion value from the delta-sigma CC front-end. Its FIR filter uses the LFO clock output, which allows it to stop the HFO clock during conversions. New conversions are available every 250 ms while CCTL[CC_ON] = 1. Proper use of this peripheral requires turning on the CC modulator in the AFE.

8.3.4 ADC Multiplexer

The ADC multiplexer provides selectable connections to the VCx inputs, TS1 inputs, internal temperature sensor, internal reference voltages, internal 1.8-V regulator, PACK input, and VSS ground reference input. In addition, the multiplexer can independently enable the TS1 input connection to the internal thermistor biasing circuitry, and also enables the user to short the multiplexer inputs for test and calibration purposes.

8.3.5 Analog-to-Digital Converter (ADC)

The second ADC is a 16-bit delta-sigma converter designed for general-purpose measurements. The ADC automatically scales the input voltage range during sampling based on channel selection. The converter resolution is a function of its full-scale range and number of bits, yielding a 38-µV resolution. The default conversion time of the ADC is 31.25 ms, but is user-configurable down to 1.95 ms. Decreasing the conversion time presents a tradeoff between conversion speed and accuracy, as the resolution decreases for faster conversion times.

8.3.6 ADC Digital Filter

The ADC digital filter generates a 24-bit conversion result from the delta-sigma ADC front end. Its FIR filter uses the LFO clock, which allows it to stop the HFO clock during conversions. The ADC digital filter is capable of providing two 24-bit results: one result from the delta-sigma ADC front-end and a second synchronous result from the delta-sigma CC front-end.

8.3.7 Internal Temperature Sensor

An internal temperature sensor is available on the bq78z100 device to reduce the cost, power, and size of the external components necessary to measure temperature. It is available for connection to the ADC using the multiplexer, and is ideal for quickly determining pack temperature under a variety of operating conditions.

8.3.8 External Temperature Sensor Support

The TS1 input is enabled with an internal 18-kΩ (Typ.) linearization pull-up resistor to support the use of a 10-kΩ (25°C) NTC external thermistor, such as the Semitec 103AT-2. The NTC thermistor should be connected between VSS and the individual TS1 pin. The analog measurement is then taken via the ADC through its input multiplexer. If a different thermistor type is required, then changes to configurations may be required.

Figure 19. External Thermistor Biasing

8.3.9 Power Supply Control

The bq78z100 device manages its supply voltage dynamically according to operating conditions. When V_VC2 > V_{SWITCHOVER–} + V_HYS, the AFE connects an internal switch to BAT and uses this pin to supply power to its internal 1.8-V LDO, which subsequently powers all device logic and flash operations. Once VC2 decreases to V_VC2 < V_{SWITCHOVER–}, the AFE disconnects its internal switch from VC2 and connects another switch to PACK, allowing sourcing of power from a charger (if present). An external capacitor connected to PBI provides a momentary supply voltage to help guard against system brownouts due to transient short-circuit or overload events that pull VC2 below V_{SWITCHOVER–}.

8.3.10 Power-On Reset

In the event of a power-cycle, the bq78z100 AFE holds its internal RESET output pin high for t_RST duration to allow its internal 1.8-V LDO and LFO to stabilize before running the AGG. The AFE enters power-on reset when the voltage at V_REG falls below V_REGIT– and exits reset when V_REG rises above V_REGIT– + V_HYS for t_RST time. After t_RST, the bq78z100 AGG will write its trim values to the AFE.

Figure 20. POR Timing Diagram

8.3.11 Bus Communication Interface

The bq78z100 device has an I²C bus communication interface by default, but can be configured to use the single-wire HDQ interface. Devices for end applications that operate in HDQ mode are intended to be kept in default I²C mode as they go through pack manufacturer production line so that they can be configured and tested at the PCB level before they are converted to HDQ mode.

8.3.12 Cell Balancing Support

The integrated cell balancing FETs included in the bq78z100 device enable the AFE to bypass cell current around a given cell or numerous cells to effectively balance the entire battery stack. External series resistors placed between the cell connections and the VCx input pins set the balancing current magnitude. The cell balancing circuitry can be enabled or disabled via the CELL_BAL_DET[CB2, CB1] control register. Series input resistors between 100 Ω and 1 kΩ are recommended for effective cell balancing.

Figure 21. Internal Cell Balancing

8.3.13 N-Channel Protection FET Drive

The bq78z100 device controls two external N-Channel MOSFETs in a back-to-back configuration for battery protection. The charge (CHG) and discharge (DSG) FETs are automatically disabled if a safety fault (AOLD, ASSC, ASCD, SOV) is detected, and can also be manually turned off using AFE_CONTROL[CHGEN, DSGEN] = 0, 0. When the gate drive is disabled, an internal circuit discharges CHG to VC2 and DSG to PACK.

8.3.14 Low Frequency Oscillator

The bq78z100 AFE includes a low frequency oscillator (LFO) running at 262.144 kHz. The AFE monitors the LFO frequency and indicates a failure via LATCH_STATUS[LFO] if the output frequency is much lower than normal.

8.3.15 High Frequency Oscillator

The bq78z100 AGG includes a high frequency oscillator (HFO) running at 16.78 MHz. It is synthesized from the LFO output and scaled down to 8.388 MHz with 50% duty cycle.

8.3.16 1.8-V Low Dropout Regulator

The bq78z100 AFE contains an integrated 1.8-V LDO that provides regulated supply voltage for the device CPU and internal digital logic.

8.3.17 Internal Voltage References

The bq78z100 AFE provides two internal voltage references with V_REF1, used by the ADC and CC, while V_REF2 is used by the LDO, LFO, current wake comparator, and OCD/SCC/SCD1/SCD2 current protection circuitry.

8.3.18 Overcurrent in Discharge Protection

The overcurrent in discharge (OCD) function detects abnormally high current in the discharge direction. The overload in discharge threshold and delay time are configurable via the OCD_CONTROL register. The thresholds and timing can be fine-tuned even further based on a sense resistor with lower resistance or wider tolerance via the PROTECTION_CONTROL register. The detection circuit also incorporates a filtered delay before disabling the CHG and DSG FETs. When an OCD event occurs, the LATCH_STATUS[OCD] bit is set to 1 and is latched until it is cleared and the fault condition has been removed.

8.3.19 Short-Circuit Current in Charge Protection

The short-circuit current in charge (SCC) function detects catastrophic current conditions in the charge direction. The short-circuit in charge threshold and delay time are configurable via the SCC_CONTROL register. The thresholds and timing can be fine-tuned even further based on a sense resistor with lower resistance or wider tolerance via the PROTECTION_CONTROL register. The detection circuit also incorporates a blanking delay before disabling the CHG and DSG FETs. When an SCC event occurs, the LATCH_STATUS[SCC] bit is set to 1 and is latched until it is cleared and the fault condition has been removed.

8.3.20 Short-Circuit Current in Discharge 1 and 2 Protection

The short-circuit current in discharge (SCD) function detects catastrophic current conditions in the discharge direction. The short-circuit in discharge thresholds and delay times are configurable via the SCD1_CONTROL and SCD2_CONTROL registers. The thresholds and timing can be fine-tuned even further based on a sense resistor with lower resistance or wider tolerance via the PROTECTION_CONTROL register. The detection circuit also incorporates a blanking delay before disabling the CHG and DSG FETs. When an SCD event occurs, the LATCH_STATUS[SCD1] or LATCH_STATUS[SCD2] bit is set to 1 and is latched until it is cleared and the fault condition has been removed.

8.3.21 Primary Protection Features

The bq78z100 gas gauge supports the following battery and system level protection features, which can be configured using firmware:

• Cell Undervoltage Protection
• Cell Overvoltage Protection
• Overcurrent in CHARGE Mode Protection
• Overcurrent in DISCHARGE Mode Protection
• Overload in DISCHARGE Mode Protection
• Short Circuit in CHARGE Mode Protection
• Overtemperature in CHARGE Mode Protection
• Overtemperature in DISCHARGE Mode Protection
• Precharge Timeout Protection
• Fast Charge Timeout Protection

8.3.22 Gas Gauging

This device uses the Impedance Track technology to measure and determine the available charge in battery cells. The accuracy achieved using this method is better than 1% error over the lifetime of the battery. There is no full charge/discharge learning cycle required. See the Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Report (SLUA364B) for further details.

8.3.23 Charge Control Features

This device supports charge control features, such as:

• Reports charging voltage and charging current based on the active temperature range—JEITA temperature ranges T1, T2, T3, T4, T5, and T6
• Provides more complex charging profiles, including sub-ranges within a standard temperature range
• Reports the appropriate charging current required for constant current charging and the appropriate charging voltage needed for constant voltage charging to a smart charger, using the bus communication interface
• Selects the chemical state-of-charge of each battery cell using the Impedance Track method, and reduces the voltage difference between cells when cell balancing multiple cells in a series
• Provides pre-charging/zero-volt charging
• Employs charge inhibit and charge suspend if battery pack temperature is out of programmed range
• Reports charging faults and indicates charge status via charge and discharge alarms

8.3.24 Authentication

This device supports security by:

• Authentication by the host using the SHA-1 method
• The gas gauge requires SHA-1 authentication before the device can be unsealed or allow full access.

8.4.1 Lifetime Logging Features

The device supports data logging of several key parameters for warranty and analysis:

• Maximum and Minimum Cell Temperature
• Maximum Current in CHARGE or DISCHARGE Mode
• Maximum and Minimum Cell Voltages

8.4.2 Configuration

The device supports accurate data measurements and data logging of several key parameters.