ZHCSPQ2 December 2022 BQ28Z620
PRODUCTION DATA
| PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VRATIO | Output voltage ratio vs battery voltage | RatioDSG = (VDSG – VVC2)/VVC2, 2.2 V < VVC2 < 4.07 V, 10 MΩ between PACK and DSG, AFE_CONTROL_REGISTER[PMPDRV]=0 | 2.133 | 2.333 | 2.467 | — | |
| RatioDSG = (VDSG – VVC2)/VVC2, 2.2 V < VVC2 < 4.07 V, 10 MΩ between PACK and DSG, AFE_CONTROL_REGISTER[PMPDRV]=1 | 1.25 | 1.4 | 1.5 | ||||
| RatioCHG = (VCHG – VVC2)/VVC2, 2.2 V < VVC2 < 4.07 V, 10 MΩ between BAT and CHG, AFE_CONTROL_REGISTER[PMPDRV]=0 | 2.133 | 2.333 | 2.467 | ||||
| RatioCHG = (VCHG – VVC2)/VVC2, 2.2 V < VVC2 < 4.07 V, 10 MΩ between BAT and CHG, AFE_CONTROL_REGISTER[PMPDRV]=1 | 1.25 | 1.4 | 1.5 | ||||
| V(FETON) | Output voltage, CHG and DSG on | VDSG(ON) = VDSG – VVC2, 4.07 V ≤ VVC2 ≤ 10 V, 10 MΩ between PACK and DSG, AFE_CONTROL_REGISTER[PMPDRV]=0 | 8.75 | 9.5 | 10.25 | V | |
| VCHG(ON) = VCHG – VVC2, 4.07 V ≤ VVC2 ≤ 10 V, 10 MΩ between VC2 and CHG, AFE_CONTROL_REGISTER[PMPDRV]=1 | 5.15 | 5.75 | 6.15 | ||||
| VCHG(ON) = VCHG – VVC2, 4.07 V ≤ VVC2 ≤ 10 V, 10 MΩ between VC2 and CHG, AFE_CONTROL_REGISTER[PMPDRV]=0 | 8.75 | 9.5 | 10.25 | ||||
| VCHG(ON) = VCHG – VVC2, 4.07 V ≤ VVC2 ≤ 10 V, 10 MΩ between VC2 and CHG, AFE_CONTROL_REGISTER[PMPDRV]=1 | 5.15 | 5.75 | 6.15 | ||||
| V(FETOFF) | Output voltage, CHG and DSG off | VDSG(OFF) = VDSG – VPACK, 10 MΩ between PACK and DSG | –0.4 | 0.4 | V | ||
| VCHG(OFF) = VCHG – VBAT, 10 MΩ between VC2 and CHG | –0.4 | 0.4 | |||||
| ICHGPUMP | CHG pin charge pump IQ | Measure device IQ with 1uA CHG pin charge pump load and 10uA charge pump load, find the delta. AFE_CONTROL_REGISTER[PUMPDRV]=0 | 70 | μA | |||
| IDSGPUMP | DSG pin charge pump IQ | Measure device IQ with 1uA DSG pin charge pump load and 10uA charge pump load, find the delta. AFE_CONTROL_REGISTER[PUMPDRV]=0 | 70 | μA | |||
| tR | Rise time | VDSG from 0% to 35% VDSG(ON)(TYP), VBAT ≥ 2.2 V, CL = 4.7 nF between DSG and PACK, 5.1 kΩ between DSG and CL, 10 MΩ between PACK and DSG | 200 | 500 | μs | ||
| VCHG from 0% to 35% VCHG(ON)(TYP), VVC2 ≥ 2.2 V, CL = 4.7 nF between CHG and VC2, 5.1 kΩ between CHG and CL, 10 MΩ between VC2 and CHG | 200 | 500 | |||||
| tF | Fall time | VDSG from VDSG(ON)(TYP) to 1 V, VVC2 ≥ 2.2 V, CL = 4.7 nF between DSG and PACK, 5.1 kΩ between DSG and CL, 10 MΩ between PACK and DSG | 40 | 300 | μs | ||
| VCHG from VCHG(ON)(TYP) to 1 V, VVC2 ≥ 2.2 V, CL = 4.7 nF between CHG and VC2, 5.1 kΩ between CHG and CL, 10 MΩ between VC2 and CHG | 40 | 200 | |||||