ZHCSG50B March 2016 – March 2017
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 說明 （續(xù)）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Functional Block Diagram
- 9.2
Feature Description
- 9.2.1 Device Power-On-Reset (POR)
- 9.2.2 Device Power Up from Battery without Input Source
- 9.2.3 Device Power Up from Input Source
- 9.2.4 Input Current Optimizer (ICO)
- 9.2.5 Boost Mode Operation from Battery
- 9.2.6 Power Path Management
- 9.2.7 Battery Charging Management
- 9.2.8 Battery Monitor
- 9.2.9 Status Outputs (PG, STAT, and INT)
- 9.2.10 BATFET (Q4) Control
- 9.2.11 Current Pulse Control Protocol
- 9.2.12 Input Current Limit on ILIM
- 9.2.13 Thermal Regulation and Thermal Shutdown
- 9.2.14 Voltage and Current Monitoring in Buck and Boost Mode
- 9.2.15 Battery Protection
- 9.2.16 Serial Interface
- 9.3 Device Functional Modes
- 9.4 Register Map
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- YFF|42
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
10.1 Application Information
A typical application consists of the device configured as an I2C controlled power path management device and a single cell battery charger for Li-Ion and Li-polymer batteries used in a wide range of smartphones and other portable devices. It integrates an input reverse-block FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and BATFET (Q4) between the system and battery. The device also integrates a bootstrap diode for the high-side gate drive.
10.2 Typical Application Diagram
Figure 49. bq25898D Application Diagram with PSEL with Interface and USB On-The-Go (OTG)
10.2.1 Design Requirements
For this design example, use the parameters shown in Table 30.
Table 30. Design Parameters
| PARAMETER | VALUE |
|---|---|
| Input voltage range | 3.9 V to 14 V |
| Input current limit | 1.5 A |
| Fast charge current | 4032 mA |
| Output voltage | 4.208 V |
10.2.2 Detailed Design Procedure
10.2.2.1 Inductor Selection
The device has 1.5 MHz switching frequency to allow the use of small inductor and capacitor values. The Inductor saturation current should be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):
The inductor ripple current depends on input voltage (VBUS), duty cycle (D = VBAT/VVBUS), switching frequency (fs) and inductance (L):
The maximum inductor ripple current happens with D = 0.5 or close to 0.5. Usually inductor ripple is designed in the range of (20–40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.
10.2.2.2 Buck Input Capacitor
Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current IPMID occurs where the duty cycle is closest to 50% and can be estimated by Equation 7:
Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. 25 V rating or higher capacitor is preferred for up to 14-V input voltage. 8.2-μF capacitance is suggested for typical of 3 A – 5 A charging current.
10.2.2.3 System Output Capacitor
Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current ICOUT is given:
The output capacitor voltage ripple can be calculated as follows:
At certain input/output voltage and switching frequency, the voltage ripple can be reduced by increasing the output filter LC. The charger device has internal loop compensator. To get good loop stability, 1-µH and minimum of 20-µF output capacitor is recommended. The preferred ceramic capacitor is 6V or higher rating, X7R or X5R.
10.2.3 Application Curves
| VBAT = 3.2 V, | VBUS = 5 V |
| VBUS = 5 V |
| VBUS = 5 V | IIN = 3 A | Charge Disable |
| VBUS = 12 V | VBAT = 3.8 V | ICHG = 3 A |
| VBAT = 3.8 V | ILOAD = 1 A |
| VBAT = 3.2 V | VBUS = 12 V |
| VBUS = 12 V |
| VBUS = 12 V | ISYS = 7 mA | Charge Disable |
| VBAT = 3.2 V, | VBUS = 5 V |
| VBUS = 5 V |
| VBUS = 9 V | IIN = 1.5 A | VBAT = 3.8 V |
| ICHG = 2 A | ISYS = 0 A - 4 A |
| VBUS = 9V | ISYS = 20 mA, | Charge Disable |
| No Battery |
| VBAT = 3.8 V | ILOAD = 0 A - 1 A |
| VBUS = 12 V |
| VBUS = 12 V | VBAT = 3.8 V | ICHG = 3 A |
10.3 System Example
