ZHCSJR3B February 2019 – November 2019 BQ25887
PRODUCTION DATA.
The device terminates a charge cycle when the battery voltage is above recharge threshold, and the current is below termination current.
When termination occurs, the STAT pin goes HIGH (charge current will continue to taper if top-off timer is enabled), status register CHRG_STAT is set to 110, and an INT pulse is asserted to the host. Termination is temporarily disabled when the charger device is in input current, voltage or thermal regulation. Termination can be permanently disabled by writing 0 to EN_TERM bit prior to charge termination.
At low termination currents (50 mA - 100 mA), due to the comparator offset, the actual termination current may be up to 20% higher than the termination target. In order to compensate for comparator offset, a programmable top-off timer (default disabled) can be applied after termination is detected.The top-off timer will follow safety timer constraints, such that if safety timer is suspended, so will the top-off timer. Similarly, if safety timer is doubled, so will the top-off timer. CHRG_STAT reports whether the top off timer is active via the 101 code. Once the Top-Off timer expires, the CHRG_STAT register is set to 110 and an INT pulse is asserted to the host.
Top-off timer gets reset (set to 0 and counting resumes when appropriate) for any of the following conditions:
The top-off timer settings are read in once termination is detected by the charger. Programming a top-off timer value after termination will have no effect unless a recharge cycle is initiated. An INT is asserted to the host when entering top-off timer segment as well as when top-off timer expires. All charge cycle related INT pulses (including top-off timer INT pulses) can be masked by CHRG_MASK bit.