ZHCSJI9A March 2019 – June 2019 BQ25886
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Device Power-On-Reset
- 8.3.2 Device Power Up from Battery without Input Source
- 8.3.3 Device Power Up from Input Source
- 8.3.4 Input Current Optimizer (ICO)
- 8.3.5 Buck Mode Operation from Battery (OTG)
- 8.3.6 PowerPath Management
- 8.3.7 Battery Charging Management
- 8.3.8 Status Outputs
- 8.3.9 Input Current Limit on ILIM Pin
- 8.3.10 Voltage and Current Monitoring
- 8.3.11 Thermal Regulation and Thermal Shutdown
- 8.3.12 Battery Protection
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
8.3.6.1 Narrow VDC Architecture
The device deploys Narrow VDC architecture (NVDC) with BATFET separating system from battery. Even with a fully depleted battery, the system is regulated above the minimum system voltage (fixed 6.2 V (typ)).
When the battery is below minimum system voltage setting, the BATFET operates in linear mode (LDO mode), and the system is typically 200 mV above the minimum system voltage setting. As the battery voltage rises above the minimum system voltage, the BATFET is fully on and the voltage difference between the system and battery is the the BATFET's drain to source voltage drop.
When the battery charging is disabled and VBAT is above minimum system voltage setting or charging is terminated, the system is always regulated at typically 50mV above battery voltage.
Figure 14. System Voltage vs. Battery Voltage