ZHCSGD8A May 2017 – May 2018
PRODUCTION DATA.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| EN_HIZ | RESET_REG | RESET_
VINDPM |
EN_OTG | EN_ICO_MODE | Reserved | ||
| R/W | R/W | R/W | R/W | R/W | R/W | ||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Reserved | BATFETOFF_
HIZ |
PSYS_OTG_
IDCHG |
|||||
| R/W | R/W | R/W | |||||
| LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
| I2C
35h |
FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 7 | EN_HIZ | R/W | 0b |
Device Hi-Z Mode Enable When the charger is in Hi-Z mode, the device draws minimal quiescent current. With VBUS above UVLO. REGN LDO stays on, and system powers from battery. 0b: Device not in Hi-Z mode <default at POR> 1b: Device in Hi-Z mode |
| 6 | RESET_REG | R/W | 0b |
Reset Registers All the registers go back to the default setting except the VINDPM register.0b: Idle <default at POR> 1b: Reset all the registers to default values. After reset, this bit goes back to 0. |
| 5 | RESET_VINDPM | R/W | 0b |
Reset VINDPM Threshold 0b: Idle 1b: Converter is disabled to measure VINDPM threshold. After VINDPM measurement is done, this bit goes back to 0 and converter starts. |
| 4 | EN_OTG | R/W | 0b |
OTG Mode Enable Enable device in OTG mode when EN_OTG pin is HIGH. 0b: Disable OTG <default at POR> 1b: Enable OTG mode to supply VBUS from battery. |
| 3 | EN_ICO_MODE | R/W | 0b |
Enable ICO Algorithm 0b: Disable ICO algorithm. <default at POR> 1b: Enable ICO algorithm. |
| 2-0 | Reserved | R/W | 0b |
Reserved |