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ZHCSN86A May 2021 – September 2021 AMC1411

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

DWL|8
- MPSS116

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

zhcsn86a_oa

6.6 Insulation Specifications

over operating ambient temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	VALUE	UNIT
GENERAL
CLR	External clearance⁽¹⁾	Shortest pin-to-pin distance through air	≥ 14.7	mm
CPG	External creepage⁽¹⁾	Shortest pin-to-pin distance across the package surface	≥ 15.7	mm
DTI	Distance through insulation	Minimum internal gap (internal clearance) of the double insulation	≥ 0.021	mm
CTI	Comparative tracking index	DIN EN 60112 (VDE 0303-11); IEC 60112	≥ 600	V
	Material group	According to IEC 60664-1	I
	Overvoltage category per IEC 60664-1	Rated mains voltage ≤ 600 V_RMS	I-IV
	Overvoltage category per IEC 60664-1	Rated mains voltage ≤ 1000 V_RMS	I-III
DIN VDE V 0884-11 (VDE V 0884-11): 2017-01
V_IORM	Maximum repetitive peak isolation voltage	At AC voltage	2260	V_PK
V_IOWM	Maximum-rated isolation working voltage	At AC voltage (sine wave)	1600	V_RMS
V_IOWM	Maximum-rated isolation working voltage	At DC voltage	2260	V_DC
V_IOTM	Maximum transient isolation voltage	V_TEST = V_IOTM, t = 60 s (qualification test)	10600	V_PK
V_IOTM	Maximum transient isolation voltage	V_TEST = 1.2 × V_IOTM, t = 1 s (100% production test)	12720	V_PK
V_IOSM	Maximum surge isolation voltage⁽²⁾	Test method per IEC 60065, 1.2/50-μs waveform, V_TEST = 1.6 × V_IOSM = 12800 V_PK (qualification)	8000	V_PK
q_pd	Apparent charge⁽³⁾	Method a, after input/output safety test subgroups 2 and 3, V_ini = V_IOTM, t_ini = 60 s, V_pd(m) = 1.2 × V_IORM, t_m = 10 s	≤ 5	pC
		Method a, after environmental tests subgroup 1, V_ini = V_IOTM, t_ini = 60 s, V_pd(m) = 1.6 × V_IORM, t_m = 10 s	≤ 5
		Method b1, at routine test (100% production) and preconditioning (type test), V_ini = V_IOTM, t_ini = 1 s, V_pd(m) = 1.875 × V_IORM, t_m = 1 s	≤ 5
C_IO	Barrier capacitance, input to output⁽⁴⁾	V_IO = 0.5 V_PP at 1 MHz	~1.5	pF
R_IO	Insulation resistance, input to output⁽⁴⁾	V_IO = 500 V at T_A = 25°C	> 10¹²	Ω
		V_IO = 500 V at 100°C ≤ T_A ≤ 125°C	> 10¹¹
		V_IO = 500 V at T_S = 150°C	> 10⁹
	Pollution degree		2
	Climatic category		55/125/21
UL1577
V_ISO	Withstand isolation voltage	V_TEST = V_ISO = 7500 V_RMS or 10600 V_DC, t = 60 s (qualification), V_TEST = 1.2 × V_ISO = 9000 V_RMS, t = 1 s (100% production test)	7500	V_RMS

(1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a PCB are used to help increase these specifications.

(2) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.

(3) Apparent charge is electrical discharge caused by a partial discharge (pd).

(4) All pins on each side of the barrier are tied together, creating a two-pin device.