ZHCSON8A July 2021 – October 2024 ADC09DJ800-Q1 , ADC09QJ800-Q1 , ADC09SJ800-Q1
PRODUCTION DATA
For the system gain management to have the best possible response time, a low-latency configurable over-range function is included. The over-range function works by monitoring the converted 9-bit samples at the ADC to quickly detect if the ADC is near saturation or already in an over-range condition. The absolute value of the upper 8 bits of the ADC data are checked against a programmable threshold, OVR_TH. Table 6-2 lists how an ADC sample is converted to an absolute value for a comparison of the thresholds.
| ADC SAMPLE (Offset Binary) | ADC SAMPLE (2's Complement) | ABSOLUTE VALUE | UPPER 8 BITS USED FOR COMPARISON |
|---|---|---|---|
| 1111 1111 1 (511) | 0111 1111 1 (+255) | 1111 1111 (255) | 1111 1111 (255) |
| 1111 1111 0 (510) | 0111 1111 0 (+254) | 1111 1110 (254) | 1111 1110 (254) |
| 1000 0000 0 (256) | 0000 0000 0 (0) | 0000 0000 (0) | 0000 0000 (0) |
| 0000 0001 0 (2) | 1000 0001 0 (–254) | 1111 1110 (254) | 1111 1110 (254) |
| 0000 0000 0 (0) | 1000 0000 0 (–256) | 1111 1111 (255) | 1111 1111 (255) |
Over-range detection is enabled by setting OVR_EN to 1. If the upper 8 bits of the absolute value equal or exceed the OVR_TH threshold during the monitoring period, then the over-range bit associated with the over-ranged ADC channel is set to 1, otherwise the over-range bit is 0. For the Quad channel device, the over-range status can be monitored on the ORA, ORB, ORC or ORD output pins for ADC channels A, B, C and D, respectively. For the dual channel device, the over-range status can be monitored on the ORA or ORB output pins for ADC channels A and B, respectively. For the single channel device, the over-range status can be monitored on the ORA output pins. OVR_N can be used to set the output pulse duration from the last over-range event. Table 6-3 lists the over-range pulse lengths for the various OVR_N settings.
| OVR_N | over-range PULSE LENGTH SINCE LAST over-range EVENT (DEVCLK Cycles) |
|---|---|
| 0 | 8 |
| 1 | 16 |
| 2 | 32 |
| 3 | 64 |
| 4 | 128 |
| 5 | 256 |
| 6 | 512 |
| 7 | 1024 |
Typically, the OVR_TH threshold is set near the 8-bit full-scale value (228 for example). When the threshold is triggered, a typical system turns down the system gain to avoid clipping. The downstream logic device then monitors the output samples to determine when the over-range condition no longer exists and then increases the system gain as desired.