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UC2572

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產(chǎn)品詳情

Rating Catalog Topology Inverting Iout (max) (A) 10 Vin (max) (V) 35 Vin (min) (V) 4.2 Vout (max) (V) -1 Vout (min) (V) -70 Features Nonsynchronous rectification, UVLO fixed Operating temperature range (°C) -40 to 85 Iq (typ) (μA) 9000 Duty cycle (max) (%) 100
Rating Catalog Topology Inverting Iout (max) (A) 10 Vin (max) (V) 35 Vin (min) (V) 4.2 Vout (max) (V) -1 Vout (min) (V) -70 Features Nonsynchronous rectification, UVLO fixed Operating temperature range (°C) -40 to 85 Iq (typ) (μA) 9000 Duty cycle (max) (%) 100
SOIC (D) 8 29.4 mm2 4.9 x 6
  • Simple Single Inductor Flyback PWM for Negative Voltage Generation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50uA Sleep Mode Current
  • Simple Single Inductor Flyback PWM for Negative Voltage Generation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50uA Sleep Mode Current

The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50uA, making the UC3572 ideal for battery powered applications.

The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50uA, making the UC3572 ideal for battery powered applications.
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類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 Negative Output Flyback Pulse Width Modulator 數(shù)據(jù)表 (Rev. A) 2001年 8月 29日

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

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