產品詳情

Configuration 2:1 SPDT Number of channels 1 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 0.5 CON (typ) (pF) 133 ON-state leakage current (max) (μA) 0.2 Supply current (typ) (μA) 0.01 Bandwidth (MHz) 43 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (A) 0.45 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 2:1 SPDT Number of channels 1 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 0.5 CON (typ) (pF) 133 ON-state leakage current (max) (μA) 0.2 Supply current (typ) (μA) 0.01 Bandwidth (MHz) 43 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (A) 0.45 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
DSBGA (YZP) 8 2.8125 mm2 2.25 x 1.25
  • Specified Break-Before-Make Switching
  • Low ON-State Resistance (0.75 Max)
  • Control Inputs Referenced to VIO
  • Low Charge Injection
  • Excellent ON-State Resistance Matching
  • Low Total Harmonic Distortion (THD)
  • 2.25-V to 5.5-V Power Supply (V+)
  • 1.65-V to 1.95-V Logic Supply (VIO)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 4000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
    • 400-V Machine Model (A115-A)
  • COM Port to GND
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • ±15-kV Contact Discharge (IEC 61000-4-2)
  • APPLICATIONS
    • Cell Phones
    • PDAs
    • Portable Instrumentation

  • Specified Break-Before-Make Switching
  • Low ON-State Resistance (0.75 Max)
  • Control Inputs Referenced to VIO
  • Low Charge Injection
  • Excellent ON-State Resistance Matching
  • Low Total Harmonic Distortion (THD)
  • 2.25-V to 5.5-V Power Supply (V+)
  • 1.65-V to 1.95-V Logic Supply (VIO)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 4000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
    • 400-V Machine Model (A115-A)
  • COM Port to GND
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • ±15-kV Contact Discharge (IEC 61000-4-2)
  • APPLICATIONS
    • Cell Phones
    • PDAs
    • Portable Instrumentation

The TS5A6542 is a single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance matching, and the break-before-make feature to prevent signal distorion during the transferring of a signal from one path to another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

The TS5A6542 has a separate logic supply pin (VIO) that is characterized to operate from 1.65 V to 1.95 V. VIO powers the control circuitry, which allows the TS5A6542 to be controlled by 1.8-V signals.

The TS5A6542 is a single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance matching, and the break-before-make feature to prevent signal distorion during the transferring of a signal from one path to another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

The TS5A6542 has a separate logic supply pin (VIO) that is characterized to operate from 1.65 V to 1.95 V. VIO powers the control circuitry, which allows the TS5A6542 to be controlled by 1.8-V signals.

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類型 標題 下載最新的英語版本 日期
* 數據表 TS5A6542 0.75-Ohm SPDT Analog Switch With Input Logic Translation 數據表 (Rev. C) 2009年 12月 11日
應用手冊 使用 2 引腳接口為 TWS 高效充電 (Rev. A) PDF | HTML 英語版 (Rev.A) PDF | HTML 2023年 5月 23日
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應用手冊 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

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仿真模型

HSPICE MODEL OF TS5A6542

SCEJ226.ZIP (90 KB) - HSpice Model
仿真模型

TS5A6542 IBIS Model

SCEM514.ZIP (67 KB) - IBIS Model
封裝 引腳 CAD 符號、封裝和 3D 模型
DSBGA (YZP) 8 Ultra Librarian

訂購和質量

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  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息:
  • 制造廠地點
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