產(chǎn)品詳情

Number of channels 2 Vrwm (V) 13 Bi-/uni-directional Bi-directional Package name LGA (PicoStar), SC70-3 Peak pulse power (8/20 μs) (max) (W) 0.27 IO capacitance (typ) (pF) 10 IEC 61000-4-2 contact (±V) 8000 IEC 61000-4-5 (A) 4.5 Clamping voltage (V) 20 Dynamic resistance (typ) 3.5 Interface type Audio Breakdown voltage (min) (V) 14 IO leakage current (max) (nA) 50 Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 2 Vrwm (V) 13 Bi-/uni-directional Bi-directional Package name LGA (PicoStar), SC70-3 Peak pulse power (8/20 μs) (max) (W) 0.27 IO capacitance (typ) (pF) 10 IEC 61000-4-2 contact (±V) 8000 IEC 61000-4-5 (A) 4.5 Clamping voltage (V) 20 Dynamic resistance (typ) 3.5 Interface type Audio Breakdown voltage (min) (V) 14 IO leakage current (max) (nA) 50 Rating Catalog Operating temperature range (°C) -40 to 85
PICOSTAR (YFM) 4 0.5929 mm2 0.77 x 0.77 SOT-SC70 (DCK) 3 4.2 mm2 2 x 2.1
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±8-kV IEC 61000-4-2 Contact Discharge
    • ±15-kV IEC 61000-4-2 Air-Gap Discharge
  • IEC 61000-4-5 Surge Protection
    • 4.5-A Peak Pulse Current (8/20-μs Pulse)
  • IO Capacitance 15 pF (Max)
  • Low 50-nA Leakage Current
  • Space-Saving PicoStar? and SOT Package
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±8-kV IEC 61000-4-2 Contact Discharge
    • ±15-kV IEC 61000-4-2 Air-Gap Discharge
  • IEC 61000-4-5 Surge Protection
    • 4.5-A Peak Pulse Current (8/20-μs Pulse)
  • IO Capacitance 15 pF (Max)
  • Low 50-nA Leakage Current
  • Space-Saving PicoStar? and SOT Package

This device is a transient voltage suppressor (TVS) based electrostatic discharge (ESD) protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, and so forth) without compromising signal integrity. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector.

The TPD2E007 is offered in a 4-bump PicoStar and 3-pin SOT (DGK) packages. The PicoStar package (YFM), with only 0.15 mm (Max) package height, is recommended for ultra space saving application where the package height is a key concern. The PicoStar package can be used in either embedded PCB board applications or in surface mount applications. The industry standard SOT package offers straightforward board layout option in legacy designs.

This device is a transient voltage suppressor (TVS) based electrostatic discharge (ESD) protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, and so forth) without compromising signal integrity. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector.

The TPD2E007 is offered in a 4-bump PicoStar and 3-pin SOT (DGK) packages. The PicoStar package (YFM), with only 0.15 mm (Max) package height, is recommended for ultra space saving application where the package height is a key concern. The PicoStar package can be used in either embedded PCB board applications or in surface mount applications. The industry standard SOT package offers straightforward board layout option in legacy designs.
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類型 標題 下載最新的英語版本 日期
* 數(shù)據(jù)表 TPD2E007 2-Channel ESD Protection Array for AC-Coupled/Negative-Rail Data Interfaces 數(shù)據(jù)表 (Rev. I) PDF | HTML 2016年 3月 22日
選擇指南 System-Level ESD Protection Guide (Rev. E) 2025年 8月 5日
應用手冊 ESD 包裝和布局指南 (Rev. B) PDF | HTML 英語版 (Rev.B) PDF | HTML 2022年 9月 14日
白皮書 Designing USB for short-to-battery tolerance in automotive environments 2016年 2月 10日

設(shè)計和開發(fā)

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評估板

ESDEVM — 適用于 ESD 二極管封裝（包括 0402、0201 等）的通用評估模塊

靜電敏感器件 (ESD) 評估模塊 (EVM) 是用于 TI 大部分 ESD 產(chǎn)品系列的開發(fā)平臺。為了測試任何型號的器件，該電路板支持所有傳統(tǒng)的 ESD 封裝結(jié)構(gòu)。器件可以焊接到相應封裝結(jié)構(gòu)，然后進行測試。如果是典型的高速 ESD 二極管，則應采用阻抗受控布局來獲取 S 參數(shù)并剝離電路板引線。如果是非高速 ESD 二極管，則應采用有布線連接到測試點的封裝結(jié)構(gòu)，以便輕松運行直流測試，例如擊穿電壓、保持電壓、漏電流等。該電路板布局布線還可以通過將信號引腳短接至信號所在的位置，輕松地將任何器件引腳連接到電源 (VCC) 或地。
用戶指南: PDF | HTML
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封裝 引腳 CAD 符號、封裝和 3D 模型
PICOSTAR (YFM) 4 Ultra Librarian
SOT-SC70 (DCK) 3 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

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