TFP401A-EP
- Supports Pixel Rates Up to 165 MHz (including 1080p and WUXGA at 60Hz)
- Digital Visual Interface (DVI) Specification Compliant(1)
- True-Color, 24 Bit/Pixel, 16.7M Colors at One or Two Pixels Per Clock
- Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
- Skew Tolerant Up to One Pixel Clock Cycle
- 4x Over-Sampling
- Reduced Power Consumption - 1.8 V Core Operation With 3.3 V I/Os and Supplies(2)
- Reduced Ground Bounce Using Time-Staggered Pixel Outputs
- Low Noise and Power Dissipation Using TI PowerPAD Packaging
- Advanced Technology Using TI 0.18-mm EPIC-5 CMOS Process
- TFP401A Incorporates HSYNC Jitter(3)
- SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C) Temperature Range (Custom temperature ranges available)
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
(1) The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TFP401A is compliant to the DVI Specification Rev. 1.0.
(2) The TFP401A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
(3) Immunity The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.
PanelBus, PowerPAD, EPIC-5 are trademarks of Texas Instruments.
The Texas Instruments TFP401A is a TI PanelBus™ flat panel display product, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401A finds applications in any design requiring high-speed digital interface. The TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true color pixel format. The TFP401A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce. PowerPAD™ advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance. The TFP401A combines PanelBus™ circuit innovation with TIs advanced 0.18-mm EPIC-5™ CMOS process technology, along with TI PowerPAD™ package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.
技術(shù)文檔
| 頂層文檔 | 類型 | 標(biāo)題 | 格式選項 | 下載最新的英語版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | TI PanelBus Digital Receiver. 數(shù)據(jù)表 (Rev. A) | 2011年 7月 14日 | |||
| * | 勘誤表 | TFP101(A), TFP201(A), TFP401(A) Errata | 2003年 11月 11日 | |||
| * | 勘誤表 | TFP101/A, TFP201/A, TFP401/A, TFP403 Data Sheet Errata | 2003年 6月 27日 | |||
| * | VID | TFP401A-EP VID V6209627 | 2016年 6月 21日 | |||
| 應(yīng)用手冊 | How to Bridge HDMI/DVI to LVDS/OLDI (Rev. C) | 2018年 6月 7日 |
設(shè)計與開發(fā)
如需其他信息或資源,請點擊以下任一標(biāo)題進(jìn)入詳情頁面查看(如有)。
PSPICE-FOR-TI — PSpice? for TI 設(shè)計和仿真工具
借助?PSpice for TI 的設(shè)計和仿真環(huán)境及其內(nèi)置的模型庫,您可對復(fù)雜的混合信號設(shè)計進(jìn)行仿真。創(chuàng)建完整的終端設(shè)備設(shè)計和原型解決方案,然后再進(jìn)行布局和制造,可縮短產(chǎn)品上市時間并降低開發(fā)成本。?
在?PSpice for TI 設(shè)計和仿真工具中,您可以搜索 TI (...)
TINA-TI — 基于 SPICE 的模擬仿真程序
TINA-TI 安裝需要大約 500MB。直接安裝,如果想卸載也很容易。我們相信您肯定會愛不釋手。
TINA 是德州儀器 (TI) 專有的 DesignSoft 產(chǎn)品。該免費(fèi)版本具有完整的功能,但不支持完整版 TINA 所提供的某些其他功能。
如需獲取可用 TINA-TI 模型的完整列表,請參閱:SpiceRack - 完整列表
需要 HSpice (...)
| 封裝 | 引腳 | CAD 符號、封裝和 3D 模型 |
|---|---|---|
| HTQFP (PZP) | 100 | Ultra Librarian |
訂購和質(zhì)量
- RoHS
- REACH
- 器件標(biāo)識
- 引腳鍍層/焊球材料
- MSL 等級/回流焊峰值溫度
- MTBF/時基故障估算
- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測
- 制造廠地點
- 封裝廠地點
推薦產(chǎn)品可能包含與 TI 此產(chǎn)品相關(guān)的參數(shù)、評估模塊或參考設(shè)計。