SN74GTL2007
- Operates as a GTL-/GTL/GTL+ to LVTTL or LVTTL to GTL-/GTL/GTL+ Translator
- Series Termination on TTL Outputs of 30

- Latch-Up Testing Done to JEDEC Standard JESD 78
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
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The SN74GTL2007 is a 12-bit translator to interface between the 3.3-V LVTTL chip set I/O and the Xeon. processor GTL-/GTL/GTL+ I/O. The device is designed for platform health management in dual-processor applications.
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| 封裝 | 引腳 | CAD 符號、封裝和 3D 模型 |
|---|---|---|
| TSSOP (PW) | 28 | Ultra Librarian |
訂購和質量
包含信息:
- RoHS
- REACH
- 器件標識
- 引腳鍍層/焊球材料
- MSL 等級/回流焊峰值溫度
- MTBF/時基故障估算
- 材料成分
- 鑒定摘要
- 持續可靠性監測
包含信息:
- 制造廠地點
- 封裝廠地點