SN74AVCB164245-Q1

正在供貨

產品詳情

Bits (#) 16 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 1.2 Vin (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Applications GPIO, I2S, JTAG, PCM, RGMII, SPI, UART Features Output enable, Partial power down (Ioff) Prop delay (ns) 2.5 Technology family AVC Supply current (max) (mA) 0.08 Rating Automotive Operating temperature range (°C) -40 to 125
Bits (#) 16 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 1.2 Vin (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Applications GPIO, I2S, JTAG, PCM, RGMII, SPI, UART Features Output enable, Partial power down (Ioff) Prop delay (ns) 2.5 Technology family AVC Supply current (max) (mA) 0.08 Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (DGG) 48 101.25 mm2 12.5 x 8.1
  • Qualified for Automotive Applications
  • Member of the Texas Instruments Widebus? Family
  • DOC? Circuitry Dynamically Changes Output Impedance,
    Resulting in Noise Reduction Without Speed Degradation
  • Dynamic Drive Capability Is Equivalent to Standard Outputs
    With IOH and IOL of ±24 mA at 2.5-V VCC
  • Control Inputs VIH/VIL Levels Are
    Referenced to VCCB Voltage
  • If Either VCC Input Is at GND, Both Ports
    Are in the High-Impedance State
  • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode
    Data Communications
  • Ioff Supports Partial-Power-Down Mode Operation
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate
    Over Full 1.4-V to 3.6-V Power-Supply Range
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 750-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.
DOC is a trademark of Texas Instruments

  • Qualified for Automotive Applications
  • Member of the Texas Instruments Widebus? Family
  • DOC? Circuitry Dynamically Changes Output Impedance,
    Resulting in Noise Reduction Without Speed Degradation
  • Dynamic Drive Capability Is Equivalent to Standard Outputs
    With IOH and IOL of ±24 mA at 2.5-V VCC
  • Control Inputs VIH/VIL Levels Are
    Referenced to VCCB Voltage
  • If Either VCC Input Is at GND, Both Ports
    Are in the High-Impedance State
  • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode
    Data Communications
  • Ioff Supports Partial-Power-Down Mode Operation
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate
    Over Full 1.4-V to 3.6-V Power-Supply Range
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 750-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.
DOC is a trademark of Texas Instruments

This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.

To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state.

This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.

To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state.

下載 觀看帶字幕的視頻 視頻

技術文檔

star =有關此產品的 TI 精選熱門文檔
未找到結果。請清除搜索并重試。
查看全部 21
類型 標題 下載最新的英語版本 日期
* 數據表 SN74AVCB164245-Q1 16-Bit Dual-Supply Bus Transceiver 數據表 (Rev. A) 2010年 5月 26日
應用手冊 原理圖檢查清單 - 使用自動雙向轉換器進行設計的指南 PDF | HTML 英語版 PDF | HTML 2024年 12月 3日
應用手冊 原理圖檢查清單 - 使用固定或方向控制轉換器進行設計的指南 PDF | HTML 英語版 PDF | HTML 2024年 10月 3日
應用手冊 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
應用手冊 了解 CMOS 輸出緩沖器中的瞬態驅動強度與直流驅動強度 PDF | HTML 最新英語版本 (Rev.A) PDF | HTML 2024年 5月 15日
選擇指南 Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
選擇指南 Logic Guide (Rev. AB) 2017年 6月 12日
應用手冊 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
應用手冊 Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 2015年 4月 30日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語版本 (Rev.AC) PDF | HTML 2014年 11月 17日
更多文獻資料 汽車邏輯器件 英語版 2014年 2月 5日
用戶指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
應用手冊 選擇正確的電平轉換解決方案 (Rev. A) 英語版 (Rev.A) 2006年 3月 23日
應用手冊 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
更多文獻資料 LCD Module Interface Application Clip 2003年 5月 9日
用戶指南 AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) 2002年 8月 20日
更多文獻資料 Standard Linear & Logic for PCs, Servers & Motherboards 2002年 6月 13日
應用手冊 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002年 5月 22日
應用手冊 Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) 1999年 7月 7日
應用手冊 AVC Logic Family Technology and Applications (Rev. A) 1998年 8月 26日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 1994年 6月 1日

設計和開發

如需其他信息或資源,請點擊以下任一標題進入詳情頁面查看(如有)。

封裝 引腳 CAD 符號、封裝和 3D 模型
TSSOP (DGG) 48 Ultra Librarian

訂購和質量

包含信息:
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息:
  • 制造廠地點
  • 封裝廠地點

支持和培訓

視頻