SN74AUP3G04

正在供貨

3 通道、0.8V 至 3.6V 低功耗反相器

產(chǎn)品詳情

Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 3 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (μA) 0.9 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 3 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (μA) 0.9 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YFP) 8 1.8 mm2 1 x 1.8 UQFN (RSE) 8 2.25 mm2 1.5 x 1.5 VSSOP (DCU) 8 6.2 mm2 2 x 3.1 X2SON (DQE) 8 1.4 mm2 1.4 x 1
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption
    (ICC = 0.9 μA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4.3 pF Typ at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Live Insertion, Partial PowerDown Mode,
    and Back Drive Protection
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar Is a trademark of Texas Instruments
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption
    (ICC = 0.9 μA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4.3 pF Typ at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Live Insertion, Partial PowerDown Mode,
    and Back Drive Protection
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar Is a trademark of Texas Instruments

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

The SN74AUP3G04 performs the Boolean function Y = A in positive logic.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

The SN74AUP3G04 performs the Boolean function Y = A in positive logic.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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類型 標(biāo)題 下載最新的英語(yǔ)版本 日期
* 數(shù)據(jù)表 SN74AUP3G04 Low-Power Triple Inverter Gate 數(shù)據(jù)表 (Rev. C) 2011年 4月 21日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 2025年 11月 13日
應(yīng)用簡(jiǎn)報(bào) 了解施密特觸發(fā)器 (Rev. B) PDF | HTML 英語(yǔ)版 (Rev.B) PDF | HTML 2025年 5月 5日
選擇指南 Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
應(yīng)用手冊(cè) How to Select Little Logic (Rev. A) 2016年 7月 26日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語(yǔ)版本 (Rev.AC) PDF | HTML 2014年 11月 17日
選擇指南 小尺寸邏輯器件指南 (Rev. E) 最新英語(yǔ)版本 (Rev.G) 2012年 7月 16日
應(yīng)用手冊(cè) Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

設(shè)計(jì)和開發(fā)

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評(píng)估板

5-8-LOGIC-EVM — 支持 5 至 8 引腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評(píng)估模塊

靈活的 EVM 設(shè)計(jì)用于支持具有 5 至 8 引腳數(shù)且采用 DCK、DCT、DCU、DRL 或 DBV 封裝的任何器件。
用戶指南: PDF
TI.com 上無(wú)現(xiàn)貨
評(píng)估板

5-8-NL-LOGIC-EVM — 支持 5 至 8 引腳 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封裝的通用邏輯和轉(zhuǎn)換 EVM

通用 EVM 旨在支持采用 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封裝的任何邏輯或轉(zhuǎn)換器件。電路板設(shè)計(jì)可實(shí)現(xiàn)靈活的評(píng)估。

用戶指南: PDF | HTML
英語(yǔ)版: PDF | HTML
TI.com 上無(wú)現(xiàn)貨
仿真模型

SN74AUP3G04 Behavioral SPICE Model

SCEM668.ZIP (7 KB) - PSpice Model
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封裝 引腳 CAD 符號(hào)、封裝和 3D 模型
DSBGA (YFP) 8 Ultra Librarian
UQFN (RSE) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian
X2SON (DQE) 8 Ultra Librarian

訂購(gòu)和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識(shí)
  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測(cè)
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

支持和培訓(xùn)

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