產品詳情

Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (μA) 0.9 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (μA) 0.9 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YFP) 4 1 mm2 1 x 1 SOT-23 (DBV) 5 8.12 mm2 2.9 x 2.8 SOT-5X3 (DRL) 5 2.56 mm2 1.6 x 1.6 SOT-SC70 (DCK) 5 4.2 mm2 2 x 2.1 USON (DRY) 6 1.45 mm2 1.45 x 1 X2SON (DPW) 5 0.64 mm2 0.8 x 0.8 X2SON (DSF) 6 1 mm2 1 x 1
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Low Static-Power Consumption
    (ICC = 0.9 μA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4.4 pF Typical at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Includes Schmitt-Trigger Inputs
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.9 ns Maximum at 3.3 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Low Static-Power Consumption
    (ICC = 0.9 μA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4.4 pF Typical at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Includes Schmitt-Trigger Inputs
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.9 ns Maximum at 3.3 V

The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity).

This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity).

This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
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技術文檔

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類型 標題 下載最新的英語版本 日期
* 數據表 SN74AUP1G14 Low-Power Single Schmitt-Trigger Inverter 數據表 (Rev. J) PDF | HTML 2017年 11月 2日
應用簡報 了解施密特觸發器 (Rev. B) PDF | HTML 英語版 (Rev.B) PDF | HTML 2025年 5月 5日
選擇指南 Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
應用手冊 Designing and Manufacturing with TI's X2SON Packages 2017年 8月 23日
選擇指南 Logic Guide (Rev. AB) 2017年 6月 12日
白皮書 Solving CMOS Transition Rate Issues Using Schmitt Trigger Solution (Rev. A) 2017年 5月 1日
應用手冊 How to Select Little Logic (Rev. A) 2016年 7月 26日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語版本 (Rev.AC) PDF | HTML 2014年 11月 17日
選擇指南 小尺寸邏輯器件指南 (Rev. E) 最新英語版本 (Rev.G) 2012年 7月 16日
應用手冊 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 1994年 6月 1日

設計和開發

如需其他信息或資源，請點擊以下任一標題進入詳情頁面查看（如有）。

評估板

5-8-LOGIC-EVM — 支持 5 至 8 引腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模塊

靈活的 EVM 設計用于支持具有 5 至 8 引腳數且采用 DCK、DCT、DCU、DRL 或 DBV 封裝的任何器件。
用戶指南: PDF
TI.com 上無現貨
仿真模型

HSPICE Model of SN74AUP1G14

SCEJ166.ZIP (87 KB) - HSpice Model
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仿真模型

SN74AUP1G14 Behavioral SPICE Model

SCEM687.ZIP (7 KB) - PSpice Model
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仿真模型

SN74AUP1G14 IBIS Model (Rev. A)

SCEM424A.ZIP (64 KB) - IBIS Model
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參考設計

TIDA-00377 — 采用 MOSFET 的自供電交流固態繼電器參考設計

采用 MOSFET 的自供電交流固態繼電器參考設計是一種單繼電器替代方法，可實現高效的電源管理，是恒溫器應用中標準機式電繼電器的低功耗替代品。該 SSR 參考設計通過 24V 交流電源線路自供電，從而消除了恒溫器電池的額外功耗。MOSFET 可快速開關，從而在不影響負載的情況下實現自充電。
設計指南: PDF
原理圖: PDF
封裝 引腳 CAD 符號、封裝和 3D 模型
DSBGA (YFP) 4 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
SOT-SC70 (DCK) 5 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DPW) 5 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian

訂購和質量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息：
  • 制造廠地點
  • 封裝廠地點

支持和培訓

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