產品詳情

Technology family AUC Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 2.7 Number of channels 2 IOL (max) (mA) 9 IOH (max) (mA) -9 Supply current (max) (μA) 10 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUC Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 2.7 Number of channels 2 IOL (max) (mA) 9 IOH (max) (mA) -9 Supply current (max) (μA) 10 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DCT) 8 11.8 mm2 2.95 x 4 VSSOP (DCU) 8 6.2 mm2 2 x 3.1
  • Available in the Texas Instruments NanoFree? Package
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub-1-V Operable
  • Max tpd of 1.8 ns at 1.8 V
  • Low Power Consumption, 10 μA at 1.8 V
  • ±8-mA Output Drive at 1.8 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments.
  • Available in the Texas Instruments NanoFree? Package
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub-1-V Operable
  • Max tpd of 1.8 ns at 1.8 V
  • Low Power Consumption, 10 μA at 1.8 V
  • ±8-mA Output Drive at 1.8 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments.

This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.

This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
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SN74AUP2G240 正在供貨 具有三態輸出的 2 通道、0.8V 至 3.6V 低功耗反相器 Larger voltage range (0.8V to 3.6V), lower average drive strength (4mA)

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類型 標題 下載最新的英語版本 日期
* 數據表 SN74AUC2G240 數據表 (Rev. C) 2007年 1月 12日
選擇指南 Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
選擇指南 Logic Guide (Rev. AB) 2017年 6月 12日
應用手冊 How to Select Little Logic (Rev. A) 2016年 7月 26日
應用手冊 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語版本 (Rev.AC) PDF | HTML 2014年 11月 17日
選擇指南 小尺寸邏輯器件指南 (Rev. E) 最新英語版本 (Rev.G) 2012年 7月 16日
用戶指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
應用手冊 選擇正確的電平轉換解決方案 (Rev. A) 英語版 (Rev.A) 2006年 3月 23日
產品概述 Design Summary for WCSP Little Logic (Rev. B) 2004年 11月 4日
應用手冊 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用戶指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
應用手冊 Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices 2003年 3月 21日
用戶指南 AUC Data Book, January 2003 (Rev. A) 2003年 1月 1日
應用手冊 Texas Instruments Little Logic Application Report 2002年 11月 1日
應用手冊 TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
更多文獻資料 Standard Linear & Logic for PCs, Servers & Motherboards 2002年 6月 13日
更多文獻資料 STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 2002年 3月 27日
更多文獻資料 AUC Product Brochure (Rev. A) 2002年 3月 18日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 1994年 6月 1日

設計和開發

如需其他信息或資源，請點擊以下任一標題進入詳情頁面查看（如有）。

評估板

5-8-LOGIC-EVM — 支持 5 至 8 引腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模塊

靈活的 EVM 設計用于支持具有 5 至 8 引腳數且采用 DCK、DCT、DCU、DRL 或 DBV 封裝的任何器件。
用戶指南: PDF
TI.com 上無現貨
仿真模型

SN74AUC2G240 Behavioral SPICE Model

SCEM708.ZIP (7 KB) - PSpice Model
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仿真模型

SN74AUC2G240 IBIS Model (Rev. A)

SCEM390A.ZIP (68 KB) - IBIS Model
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仿真模型

SN74AUC2G240 PSpice Model

SCEM574.ZIP (63 KB) - PSpice Model
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封裝 引腳 CAD 符號、封裝和 3D 模型
SSOP (DCT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian

訂購和質量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息：
  • 制造廠地點
  • 封裝廠地點

支持和培訓

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