產品詳情

Number of channels 2 Technology family LS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 45 IOL (max) (mA) 16 IOH (max) (mA) -0.4 Supply current (max) (μA) 4000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 2 Technology family LS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 45 IOL (max) (mA) 16 IOH (max) (mA) -0.4 Supply current (max) (μA) 4000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm2 19.56 x 6.92
  • Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

 
  • Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

 

The '76 contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. The '76 is a positive-edge-triggered flip-flop. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

The 'LS76A contain two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. The preset and clear are asynchronous active low inputs. When low they override the clock and data inputs forcing the outputs to the steady state levels as shown in the function table.

The SN5476 and the SN54LS76A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7476 and the SN74LS76A are characterized for operation from 0°C to 70°C.

 

The '76 contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. The '76 is a positive-edge-triggered flip-flop. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

The 'LS76A contain two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. The preset and clear are asynchronous active low inputs. When low they override the clock and data inputs forcing the outputs to the steady state levels as shown in the function table.

The SN5476 and the SN54LS76A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7476 and the SN74LS76A are characterized for operation from 0°C to 70°C.

 
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類型 標題 下載最新的英語版本 日期
* 數據表 Dual J-K Flip-Flops With Preset And Clear 數據表 1988年 3月 1日

訂購和質量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息：
  • 制造廠地點
  • 封裝廠地點

支持和培訓