DS90LV049Q-Q1

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汽車級 LVDS 雙通道高速差分收發器

產品詳情

Function Transceiver Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVCMOS, LVDS, LVTTL Output signal LVCMOS, LVDS Rating Automotive Operating temperature range (°C) -40 to 125
Function Transceiver Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVCMOS, LVDS, LVTTL Output signal LVCMOS, LVDS Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm2 5 x 6.4
  • AECQ-100 Grade 1
  • Up to 400 Mbps Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 50 ps Typical Driver Channel-to-Channel Skew
  • 50 ps Typical Receiver Channel-to-Channel Skew
  • 3.3 V Single Power Supply Design
  • TRI-STATE Output Control
  • Internal Fail-Safe Biasing of Receiver Inputs
  • Low Power Dissipation (70 mW at 3.3 V Static)
  • High Impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644-A LVDS Standard
  • Available in Low Profile 16 Pin TSSOP Package

All trademarks are the property of their respective owners.

  • AECQ-100 Grade 1
  • Up to 400 Mbps Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 50 ps Typical Driver Channel-to-Channel Skew
  • 50 ps Typical Receiver Channel-to-Channel Skew
  • 3.3 V Single Power Supply Design
  • TRI-STATE Output Control
  • Internal Fail-Safe Biasing of Receiver Inputs
  • Low Power Dissipation (70 mW at 3.3 V Static)
  • High Impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644-A LVDS Standard
  • Available in Low Profile 16 Pin TSSOP Package

All trademarks are the property of their respective owners.

The DS90LV049Q is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV049Q drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. The receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049Q supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.

The DS90LV049Q is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV049Q drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. The receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049Q supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.
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類型 標題 下載最新的英語版本 日期
* 數據表 DS90LV049Q Automotive LVDS Dual Line Driver and Receiver Pair 數據表 (Rev. D) 2013年 4月 16日
應用簡報 LVDS to Improve EMC in Motor Drives 2018年 9月 27日
應用手冊 An Overview of LVDS Technology 1998年 10月 5日

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如需其他信息或資源，請點擊以下任一標題進入詳情頁面查看（如有）。

評估板

DS90LV047-48AEVM — DS90LV047-48AEVM 評估模塊

DS90LV047-48AEVM 是一款評估模塊 (EVM)，專為評估德州儀器 (TI) DS90LV047A 3V LVDS 四通道 CMOS 差動線路驅動器和 DS90LV048A 3V LVDS CMOS 差動線路接收器的性能和功能而設計。借助此套件，用戶可在 DS90LV047A 和 DS90LV048A 的支持下快速評估輸出波形特性和信號完整性?？赏ㄟ^接頭引腳訪問 DS90LV047A 和 DS90LV048A 輸入和輸出，還有助于連接到實驗室設備或用戶系統以進行性能評估。
用戶指南: PDF
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仿真模型

DS90LV049 IBIS Model

SNLM024.ZIP (18 KB) - IBIS Model
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用戶指南: PDF
英語版 (Rev.A): PDF
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TSSOP (PW) 16 Ultra Librarian

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