產(chǎn)品詳情

Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating HiRel Enhanced Product Interpolation 1x Power consumption (typ) (mW) 290 Architecture Current Source Operating temperature range (°C) -55 to 125 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating HiRel Enhanced Product Interpolation 1x Power consumption (typ) (mW) 290 Architecture Current Source Operating temperature range (°C) -55 to 125 Reference type Ext, Int
TQFP (PFB) 48 81 mm2 9 x 9
  • 10-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 200 MSPS Update Rate
  • Single Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3):
    78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2 V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin Quad Flat Pack (TQFP)
  • 10-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 200 MSPS Update Rate
  • Single Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3):
    78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2 V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin Quad Flat Pack (TQFP)

The DAC5652 is a monolithic, dual channel, 10-bit, high speed, digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high impedance differential current output, suitable for single ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2 V reference voltage. Optionally, an external reference may be used.

The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652 has been specifically designed for a differential transformer coupled output with a 50 Ω doubly terminated load. For a 20 mA full scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5652 is available in a 48-pin thin quad flat pack (TQFP). Pin compatibility between family members provides 10-bit (DAC5652), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. Furthermore, the DAC5652 is pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the military temperature range of –55°C to 125°C.

The DAC5652 is a monolithic, dual channel, 10-bit, high speed, digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high impedance differential current output, suitable for single ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2 V reference voltage. Optionally, an external reference may be used.

The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652 has been specifically designed for a differential transformer coupled output with a 50 Ω doubly terminated load. For a 20 mA full scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5652 is available in a 48-pin thin quad flat pack (TQFP). Pin compatibility between family members provides 10-bit (DAC5652), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. Furthermore, the DAC5652 is pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the military temperature range of –55°C to 125°C.

下載 觀看帶字幕的視頻 視頻

技術(shù)文檔

star =有關(guān)此產(chǎn)品的 TI 精選熱門文檔
未找到結(jié)果。請清除搜索并重試。
查看全部 5
頂層文檔 類型 標題 格式選項 下載最新的英語版本 日期
* 數(shù)據(jù)表 DAC5652-EP 數(shù)據(jù)表 (Rev. C) 2013年 4月 24日
* VID DAC5652-EP VID V6206638 2016年 6月 21日
應用手冊 High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日
應用手冊 所選封裝材料的熱學和電學性質(zhì) 2008年 10月 16日
應用手冊 高速數(shù)據(jù)轉(zhuǎn)換 英語版 2008年 10月 16日

設(shè)計與開發(fā)

如需其他信息或資源,請點擊以下任一標題進入詳情頁面查看(如有)。

模擬工具

PSPICE-FOR-TI — PSpice? for TI 設(shè)計和仿真工具

PSpice? for TI 可提供幫助評估模擬電路功能的設(shè)計和仿真環(huán)境。此功能齊全的設(shè)計和仿真套件使用 Cadence? 的模擬分析引擎。PSpice for TI 可免費使用,包括業(yè)內(nèi)超大的模型庫之一,涵蓋我們的模擬和電源產(chǎn)品系列以及精選的模擬行為模型。

借助?PSpice for TI 的設(shè)計和仿真環(huán)境及其內(nèi)置的模型庫,您可對復雜的混合信號設(shè)計進行仿真。創(chuàng)建完整的終端設(shè)備設(shè)計和原型解決方案,然后再進行布局和制造,可縮短產(chǎn)品上市時間并降低開發(fā)成本。?

在?PSpice for TI 設(shè)計和仿真工具中,您可以搜索 TI (...)
封裝 引腳 CAD 符號、封裝和 3D 模型
TQFP (PFB) 48 Ultra Librarian

訂購和質(zhì)量

包含信息:
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息:
  • 制造廠地點
  • 封裝廠地點

推薦產(chǎn)品可能包含與 TI 此產(chǎn)品相關(guān)的參數(shù)、評估模塊或參考設(shè)計。

支持和培訓

視頻