TIDT387 March 2024 LM25148-Q1 , LM74910-Q1 , TPS389006-Q1 , TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1 , TPS746-Q1 , TPS7B69-Q1
| Rail Name | Voltage | DC Spec. | AC Spec. | Current | Step | Sequence # |
|---|---|---|---|---|---|---|
| VCCINT, VCC_SOC | 0.8V | ±1% | ±17mV | 39A | 33% | 2 |
| VCCO | 1.5V | ±1% | ±5% | 3A | 100% | 1 |
| VCCAUX | 1.5V | ±1% | 10mVPP | 1.1A | 100% | 3 |
| GTAVCC, MGTYAVCC | 0.88V | ±2% | 10mVPP | 0.7A | 70% | 4 |
| GTAVTT, MGTYATT | 1.2V | ±2% | 10mVPP | 1.3A | 70% | 6 |
| GTAVCCAUX, MGTYAVCCAUX | 1.5V | ±2% | 10mVPP | 0.05A | 70% | 5 |
Table 1-2 shows the voltages, currents, and switching frequencies pertaining to the reference design.
| Parameters | Specifications |
|---|---|
| VIN | 9VDC to 18VDC Continuous (6VIN Minimum Crank; 42VIN Maximum Load Dump) |
| VOUT (Buck 5V Pre-Regulator) | 5VDC |
| IOUT (Buck 5V Pre-Regulator) | 12A Maximum |
| FSW (Buck Pre-Regulator) | 440kHz Nominal |
| VOUT (VCCINT, VCC SOC) | 0.8VDC |
| IOUT (VCCINT, VCC SOC) | 39A Maximum |
| FSW (VCCINT, VCC SOC) | 2.25MHz per phase (4.5MHz effective interleaved) |
| VOUT (VCCO) | 1.0VDC |
| IOUT (VCCO) | 3A |
| FSW (VCCO) | 4.4MHz |
| VOUT (VCCAUX) | 1.5VDC |
| IOUT (VCCAUX) | 1.1A |
| FSW (VCCAUX) | 4.4MHz Nominal |
| VOUT (GTAVCC, MGTYAVCC) | 0.88VDC |
| IOUT (GTAVCC, MGTYAVCC) | 0.7A |
| FSW (GTAVCC, MGTYAVCC) | 2.2MHz Nominal |
| VOUT (GTAVTT, MGTYAVTT) | 1.2VDC |
| IOUT (GTAVTT, MGTYAVTT) | 1.3A |
| FSW (GTAVCC, MGTYAVCC) | 4.4MHz Nominal |
| VOUT (GTAVCCAUX, MGTYAVCCAUX) | 1.5VDC |
| IOUT (GTAVCCAUX, MGTYAVCCAUX) | 0.05A |
| FSW (GTAVCCAUX, MGTYAVCCAUX) | 0Hz (LDO) |