SNVU754A October 2021 – November 2021 LM5013-Q1
5 PCB Layout
Top Layer and Silkscreen Layer through Bottom Layer Routing show the board layout for the LM5013-Q1EVM. The EVM offers resistors, capacitors, and test points to configure the output voltage, precision enable, and switching frequency.
The 8-pin SO PowerPAD package offers an exposed thermal pad, which must be soldered to the copper landing on the PCB for optimal thermal performance. The PCB consists of a 4-layer design. There are 2-oz copper planes on the top and bottom and 1-oz copper mid-layer planes to dissipate heat with an array of thermal vias under the thermal pad to connect to all four layers.
Test points have been provided for ease of use to connect the power supply, required load, and to monitor critical signals.
Figure 5-1 Top
Layer and Silkscreen Layer
Figure 5-3 Mid-Layer 2 Routing
Figure 5-2 Mid-Layer 1 Ground Plane
Figure 5-4 Bottom Layer Routing