SNLA224B June 2014 – October 2025 DS90UB913A-Q1 , DS90UB954-Q1 , DS90UB960-Q1 , DS90UB9702-Q1
- 1
- Abstract
- Trademarks
- 1Introduction
- 2Theory of Operation for Power Over Coax
- 3Design Considerations
- 4FPD-Link PoC Requirements
- 5PoC Noise
-
6TI Reviewed PoC Networks
- 6.1 PoC Network from FPD-Link III Data Sheet
- 6.2 Murata FPD3 Networks
- 6.3 TDK FPD3 Networks
- 6.4 Coilcraft FPD3 Networks
- 6.5
Murata FPD4 Networks
- 6.5.1 Design 1
- 6.5.2 Design 2
- 6.5.3 Design 3
- 6.5.4 Design 4
- 6.5.5 Design 5
- 6.5.6 Design 6
- 6.5.7 Design 7
- 6.5.8 Design 8
- 6.5.9 Design 9
- 6.5.10 Design 10
- 6.5.11 Design 11
- 6.5.12 Design 12
- 6.5.13 Design 13
- 6.5.14 Design 14
- 6.5.15 Design 15
- 6.5.16 Design 16
- 6.5.17 Design 17
- 6.5.18 Design 18
- 6.5.19 Design 19
- 6.5.20 Design 20
- 6.5.21 Design 21
- 6.5.22 Design 22
- 6.5.23 Design 23
- 6.5.24 Design 24
- 6.5.25 Design 25
- 6.5.26 Design 26
- 6.5.27 Design 27
- 6.5.28 Design 28
- 6.5.29 Design 29
- 6.6
TDK FPD4 Networks
- 6.6.1 Design 1
- 6.6.2 Design 2
- 6.6.3 Design 3
- 6.6.4 Design 4
- 6.6.5 Design 5
- 6.6.6 Design 6
- 6.6.7 Design 7
- 6.6.8 Design 8
- 6.6.9 Design 9
- 6.6.10 Design 10
- 6.6.11 Design 11
- 6.6.12 Design 12
- 6.6.13 Design 13
- 6.6.14 Design 14
- 6.6.15 Design 15
- 6.6.16 Design 16
- 6.6.17 Design 17
- 6.6.18 Design 18
- 6.6.19 Design 19
- 6.6.20 Design 20
- 6.6.21 Design 21
- 6.6.22 Design 22
- 6.6.23 Design 23
- 6.7 Coilcraft FPD4 Networks
- 7Summary
- 8References
- 9Revision History
2 Theory of Operation for Power Over Coax
The purpose of a Power over Coax network is to separate the high-speed data signal from the DC power signal. The high-speed signal content consists of a high-speed forward channel carrying video and control data to the deserializer and a lower speed back channel carrying control data to the serializer. Figure 2-1 shows a high-level overview of how FPD-Link and DC power share a single coax cable. For proper separation the DC component of the FPD-Link signal must be completely blocked from entering the DOUT pins of the serializer and the RIN pins of the deserializer. This is accomplished by placing AC Coupling capacitors in line with the FPD-Link signal path, which blocks the DC signal and passes the forward and back channel signals. A simple capacitor can work for this since a simple capacitor has very low impedance over the forward and back channel frequency and is an open circuit at DC.
The PoC network is a type of low pass filter circuit that is designed to pass the transmitted DC signal with minimal interference on the high-speed AC signal. For this low pass filter circuit to not interfere with the high-speed signal, the circuit needs to have an impedance much larger than the characteristic impedance of the channel. It is recommended that an impedance of 1 k? be met over the entire FPD-Link operational frequency band.
Figure 2-1 PoC Theory of Operation