The switching losses mostly occurring when the FETs are turning ON and OFF. A loss is generated during the transition (the rising and falling transitions). The switching-loss on the high-side FET is calculated with Equation 4:

where

• t_rise is the rise time of the switch node voltage
• t_fall is the fall time of the switch node voltage
• Fsw is the switching frequency on the converter.

As Equation 4 shows, the switching frequency, rise and fall time have a direct impact on the switching losses. When selecting the switching frequency of the TPS62903, it is always good to consider using the lowest setting, in this case, 1 MHz with Power Save Operation Mode (Auto PFM/PWM). In this mode, the switching frequency decreases linearly with the load current maintaining high efficiency. The losses in the low-side FET can be estimated in the same manner.