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SLUUCJ0 November 2023 BQ76907

12.2.3.8 Settings:Protection:Cell Open Wire SLEEP Check Time

Class	Subclass	Name	Type	Min	Max	Default	Unit
Settings	Protection	Cell Open Wire SLEEP Check Time	H1	0x00	0xFF	0x10	Hex

RSVD0

COWDLY_2

COWDLY_1

COWDLY_0

COWSEN

COWSTIME_2

COWSTIME_1

COWSTIME_0

Description: This register sets the timing for the cell open-wire checks in SLEEP mode

Table 12-15 Cell Open Wire SLEEP Check Time Register Field Descriptions

Bit	Field	Default	Description
6–4	COWDLY_2–COWDLY_0	1	This setting determines the delay from when the cell open-wire current is disabled before cell measurements begin in NORMAL mode, to allow voltage transients at the cell input pins to settle. 0 = No delay 1 = 1 ms delay 2 = 2 ms delay 3 = 4 ms delay 4 = 8 ms delay 5 = 16 ms delay 6 = 32 ms delay 7 = 64 ms delay
3	COWSEN	0	Enable cell open-wire checks during SLEEP mode. 0 = Cell open-wire checks are disabled in SLEEP mode. 1 = Cell open-wire checks are enabled in SLEEP mode.
2–0	COWSTIME_2–COWSTIME_0	0	To detect a broken connection between a cell in the stack and the PCB, the device periodically enables a current from each enabled cell input to VSS. 0 = Current sources are activated once every 8 burst measurements. 1 = Current sources are activated once every 4 burst measurements. 2 = Current sources are activated once every 2 burst measurements. 3 = Current sources are activated once every burst measurement. 4 = Current sources are activated twice every burst measurement. 5 = Current sources are activated 4 times every burst measurement. 6 = Current sources are activated 8 times every burst measurement. 7 = Current sources are activated 16 times every burst measurement.

Bit

Field

Default

Description

6–4

COWDLY_2–COWDLY_0

This setting determines the delay from when the cell open-wire current is disabled before cell measurements begin in NORMAL mode, to allow voltage transients at the cell input pins to settle.

0 = No delay

1 = 1 ms delay

2 = 2 ms delay

3 = 4 ms delay

4 = 8 ms delay

5 = 16 ms delay

6 = 32 ms delay

7 = 64 ms delay

COWSEN

Enable cell open-wire checks during SLEEP mode.

0 = Cell open-wire checks are disabled in SLEEP mode.

1 = Cell open-wire checks are enabled in SLEEP mode.

2–0

COWSTIME_2–COWSTIME_0

To detect a broken connection between a cell in the stack and the PCB, the device periodically enables a current from each enabled cell input to VSS.

0 = Current sources are activated once every 8 burst measurements.

1 = Current sources are activated once every 4 burst measurements.

2 = Current sources are activated once every 2 burst measurements.

3 = Current sources are activated once every burst measurement.

4 = Current sources are activated twice every burst measurement.

5 = Current sources are activated 4 times every burst measurement.

6 = Current sources are activated 8 times every burst measurement.

7 = Current sources are activated 16 times every burst measurement.