SLAZ283AA October 2012 – May 2021 MSP430F5435
DMA Module
Functional
Corrupted write access to 20-bit DMA registers
When a 20-bit wide write to a DMA address register (DMAxSA or DMAxDA) is interrupted by a DMA transfer, the register contents may be unpredictable.
1. Design the application to guarantee that no DMA access interrupts 20-bit wide accesses to the DMA address registers.
OR
2. When accessing the DMA address registers, enable the Read Modify Write disable bit (DMARMWDIS = 1) or temporarily disable all active DMA channels (DMAEN = 0).
OR
3. Use word access for accessing the DMA address registers. Note that this limits the values that can be written to the address registers to 16-bit values (lower 64K of Flash).