SLAZ281AA October 2012 – May 2021 MSP430F5419
DMA Module
Functional
DMAxSZ is not updated correctly
The total number of DMA transactions to be executed per transfer (stored initially in DMAxSZ) is updated under the following conditions:
1. A DMA transfer has been completed.
- DMAxSZ is refreshed by the value in the temporary register, T_Size, because it has been decremented to zero (ANY MODE).
- DMAxSZ is refreshed by the value in the temporary register, T_Size, because the DMA enable bit has transitioned from Hi -> Lo (ANY NON-REPEAT MODE).
2. A value is written into the DMAxSZ register by the application when the DMA state machine is in the Reset state (DMAEN = 0).
For all transfer modes the second condition is false. Writing to the DMAxSZ register (in an NMI service routine, for instance) immediately affects the DMAxSZ counter and the DMA will execute transfers until the DMAxSZ value decrements to zero, regardless of the current DMA state or DMAxSZ value.
The application should ensure that the DMAxSZ register is only written when the DMA is in the Reset state (DMAEN = 0).