SLAZ201I October 2012 – May 2021 MSP430F427
TA Module
Functional
First increment of TAR erroneous when IDx > 00
The first increment of TAR after any timer clear event (POR/TACLR) happens immediately following the first positive edge of the selected clock source (INCLK, SMCLK, ACLK or TACLK). This is independent of the clock input divider settings (ID0, ID1). All following TAR increments are performed correctly with the selected IDx settings.
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