SFFSAE1 September 2025 TPSM65630
4.1 WQFN-FCRLF (19) Package
Figure 4-1 shows the TPSM656x0 pin diagram. For a detailed description of the device pins refer to the Pin Configuration and Functions section in the TPSM656x0 data sheet.
Figure 4-1 Pin DiagramTable 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| FB | 1 | If the pin is configured for the fixed 3.3Vout option, the FB pin shorts to ground by default. Normal operation. | D |
| If the pin is configured for the fixed 5Vout option, the VCC pin shorts to ground. There is a loss of regulation. | B | ||
| If the pin is configured for the adjustable output option, there is a loss of regulation. VOUT = VIN. | B | ||
| If short happens at start-up, the device goes into the fixed 3.3Vout option. | B | ||
| VOUT | 2 | VOUT = 0V. | B |
| MODE/SYNC | 3 | There is no flag if configured for a PFM safe fault. The synchronize function is lost. | B |
| The VCC pin shorts to ground if configured for a FPWM. VOUT = 0V. | B | ||
| RT | 4 | The VCC pin shorts to ground if the pin is configured for 400kHz. VOUT = 0V. | B |
| There is a loss of regulation for the adjustable frequencies. | B | ||
| The result is a safe fault if the pin is configured for 2.2MHz. Normal operation. | D | ||
| If short happens at start-up, an unstable operation potentially occurs for the 2.2MHz configuration. | C | ||
| EN/UVLO | 5 | The device is disabled, VOUT = 0V. | B |
| NC | 6 | Normal operation. | D |
| 7 | |||
| 15 | |||
| PGND | 8 | Normal operation. | D |
| 12 | |||
| VIN | 9 | VOUT = 0V. | B |
| 11 | |||
| SW | 10 | The device is damaged. | A |
| BIAS | 13 | If the BIAS pin is tied to the VOUT pin, VOUT = 0V. | B |
| If the BIAS pin is at ground, the result is a safe fault. | D | ||
| VCC | 14 | There is a loss of regulation. VOUT = 0V. | B |
| PGOOD | 16 | There is a loss of the power-good (PG) function. | B |
| GND | 17 | Normal operation. | D |
| 18 | |||
| BOOT | 19 | There is a loss of regulation, VOUT = 0V. | B |
Table 4-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| FB | 1 | The next cycle is a non-switching cycle when the FB pin is configured for the fixed Vout option. PG is low. | C |
| If open happens at start-up, there is no regulation. VOUT = 0V. | B | ||
| If the FB pin is configured for the adjustable Vout option, VOUT = VIN. | B | ||
| VOUT | 2 | There is a loss of the power output. | B |
| MODE/SYNC | 3 | No flag; a PFM occurs in the next cycle. There is a loss of the external synchronize function. | B |
| RT | 4 | A PG low occurs in the next turn-on cycle for the 2.2MHz configuration. | C |
| There is a loss of regulation for the adjustable frequencies, VOUT = 0V. | B | ||
| EN/UVLO | 5 | The device is disabled, VOUT = 0V. | B |
| NC | 6 | Normal operation. | D |
| 7 | |||
| 15 | |||
| PGND | 8 | Normal operation. There is a degradation in performance. | C |
| 12 | |||
| VIN | 9 | Normal operation. There is a degradation in performance. | B |
| 11 | |||
| SW | 10 | Normal operation. | D |
| BIAS | 13 | Normal operation. | D |
| VCC | 14 | The operation is unstable. No damage. | B |
| PGOOD | 16 | There is a loss of the power-good function. | B |
| GND | 17 | Normal operation. There is a degradation in performance. | C |
| 18 | |||
| BOOT | 19 | Normal operation. | D |
Table 4-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| FB | 1 | VOUT | The device is damaged if the VOUT pin is greater than the absolute maximum rating for the FB pin when a short occurs. | A |
| VOUT | 2 | MODE/SYNC | The device is damaged if the VOUT pin is greater than the absolute maximum rating for the MODE/SYNC pin when a short occurs. | A |
| MODE/SYNC | 3 | RT | The operation is normal when the RT and MODE pins are at ground. | D |
| There is a loss of operation when the RT pin is at ground and the MODE pin is tied to VCC. | B | |||
| The MODE pin is at VCC when the RT pin is populated with a resistor. | C | |||
| There is a loss of operation when the RT pin is populated with a resistor and the MODE pin is at ground. | B | |||
| At start-up,
if the RT pin is populated with a resistor and the MODE pin is at
VCC. An unstable operation potentially occurs during a 400kHz operation. |
C | |||
| RT | 4 | EN/UVLO | There is a loss of regulation when the RT pin is populated with a resistor and enabled at the VIN pin. | B |
| There is a loss of regulation when the RT pin is at ground and enabled at the VIN pin. | B | |||
| There is damage to the device when the RT pin is tied to the VCC pin and enabled at the VIN pin. | A | |||
| EN/UVLO | 5 | NC | Normal operation. | D |
| NC | 6 | NC | Normal operation. | D |
| NC | 7 | PGND1 | Normal operation. | D |
| PGND1 | 8 | VIN1 | VOUT = 0V. | B |
| VIN1 | 9 | SW | There is damage to the device. | A |
| SW | 10 | VIN2 | There is damage to the device. | A |
| VIN2 | 11 | PGND2 | VOUT = 0V. | B |
| PGND2 | 12 | BIAS | The operation is normal if the BIAS pin is at ground. | D |
| Hiccup mode occurs if the BIAS pin is tied to the VOUT pin. | B | |||
| The operation is normal if the BIAS pin is floating. | D | |||
| BIAS | 13 | VCC | The BIAS pin
is tied to the VOUT pin for the fixed Vout options. There is damage to the device if the VOUT pin is greater than the absolute maximum rating for the VCC pin when a short occurs. |
A |
| VCC | 14 | NC | Normal operation. | D |
| NC | 15 | PGOOD | Normal operation. | D |
| PGOOD | 16 | FB | There is a loss of regulation when the FB pin is configured for the adjustable Vout options. | B |
| There is a loss of the PG function when the FB pin is configured for the fixed Vout options. | C | |||
| There is a loss of the PG function at start-up when the FB pin is configured for the fixed 3.3Vout option. | C | |||
| PGOOD shorts VCC to ground at start-up if the FB pin is configured for the fixed 5Vout option. | B |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to Supply
| Pin Name | Pin No | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| FB | 1 | There is damage to the device if the supply is > 5.5V. | A |
| VOUT | 2 | There is damage to the device if VIN > 24V. | A |
| MODE/SYNC | 3 | There is damage to the device if the supply is > 5.5V. | A |
| RT | 4 | The switching frequency is undefined. | C |
| EN/UVLO | 5 | Normal operation. | D |
| NC | 6 | Normal operation. | D |
| 7 | |||
| 15 | |||
| PGND | 8 | VOUT = 0V. | B |
| 12 | |||
| VIN | 9 | Normal operation. | D |
| 11 | |||
| SW | 10 | There is damage to the device. | A |
| BIAS | 13 | The device is potentially damaged if the input supply is greater than absolute maximum rating for the BIAS pin. | A |
| VCC | 14 | There is damage to the device if the supply is > 5.5V. | A |
| PGOOD | 16 | The device is potentially damaged if the input supply is greater than the absolute maximum rating for the PG pin. | A |
| GND | 17 | VOUT = 0V. | B |
| 18 | |||
| BOOT | 19 | There is damage to the device. | A |