4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TLV9152-Q1 (VSSOP (DGK) | 8, SOIC (D) | 8, and TSSOP (PW) | 8 packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

• Pin short-circuited to ground (see Table 4-2, Table 4-6, and Table 4-10)
• Pin open-circuited (see Table 4-3, Table 4-7, and Table 4-11)
• Pin short-circuited to an adjacent pin (see Table 4-4, Table 4-8, and Table 4-12)
• Pin short-circuited to supply (see Table 4-5, Table 4-9, and Table 4-13)

Table 4-2 through Table 4-13 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

• Short circuit to power means short to V+
• Short circuit to GND and short circuit to ground mean short to V?
• V+ is equivalent to VCC
• V? is equivalent to VEE