SFFSA77 January 2025 DRV81008-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the DRV81008-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to supply (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure
Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the DRV81008-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the DRV81008-Q1 data sheet.
Figure 4-1 Pin DiagramFollowing is the assumption of use and the device configuration assumed for the pin FMA in this section:
- The device is used with external components consistent with the values described in the external component table of the data sheet.
Table 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| nSCS | 1 | SPI communication is nonfunctional. | B |
| SCLK | 2 | SPI communication is nonfunctional. | B |
| SDI | 3 | SPI communication is nonfunctional. | B |
| SDO | 4 | SPI communication is nonfunctional. | B |
| GND | 5 | Intended operation. | D |
| OUT0 | 6 | Loss of load control. | B |
| OUT2 | 7 | Loss of load control. | B |
| GND | 8 | Intended operation. | D |
| OUT4 | 9 | Loss of load control. | B |
| NC | 10 | No impact to device functionality. | D |
| NC | 11 | No impact to device functionality. | D |
| OUT6 | 12 | Loss of load control. | B |
| OUT7 | 13 | Loss of load control. | B |
| NC | 14 | No impact to device functionality. | D |
| NC | 15 | No impact to device functionality. | D |
| OUT5 | 16 | Loss of load control. | B |
| GND | 17 | Intended operation. | D |
| OUT3 | 18 | Loss of load control. | B |
| OUT1 | 19 | Loss of load control. | B |
| VM | 20 | VM undervoltage warning. | B |
| nSLEEP | 21 | SPI communication is nonfunctional. | B |
| IN1 | 22 | Loss of load control. | B |
| IN0 | 23 | Loss of load control. | B |
| VDD | 24 | SPI communication is nonfunctional. | B |
Table 4-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| nSCS | 1 | SPI communication is nonfunctional. | B |
| SCLK | 2 | SPI communication is nonfunctional. | B |
| SDI | 3 | SPI communication is nonfunctional. | B |
| SDO | 4 | SPI communication is nonfunctional. | B |
| GND | 5 | Loss of load control. | B |
| OUT0 | 6 | False faults are potentially detected. | B |
| OUT2 | 7 | False faults are potentially detected. | B |
| GND | 8 | Loss of load control. | B |
| OUT4 | 9 | False faults are potentially detected. | B |
| NC | 10 | No impact to device functionality. | D |
| NC | 11 | No impact to device functionality. | D |
| OUT6 | 12 | False faults are potentially detected. | B |
| OUT7 | 13 | False faults are potentially detected. | B |
| NC | 14 | No impact to device functionality. | D |
| NC | 15 | No impact to device functionality. | D |
| OUT5 | 16 | False faults are potentially detected. | B |
| GND | 17 | Loss of load control. | B |
| OUT3 | 18 | False faults are potentially detected. | B |
| OUT1 | 19 | False faults are potentially detected. | B |
| VM | 20 | VM undervoltage warning. | B |
| nSLEEP | 21 | SPI communication is nonfunctional. | B |
| IN1 | 22 | Loss of load control. | B |
| IN0 | 23 | Loss of load control. | B |
| VDD | 24 | SPI communication is nonfunctional. | B |
Table 4-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| nSCS | 1 | 2 | SPI communication is nonfunctional. | B |
| SCLK | 2 | 3 | SPI communication is nonfunctional. | B |
| SDI | 3 | 4 | SPI communication is nonfunctional. | B |
| SDO | 4 | 5 | SPI communication is nonfunctional. | B |
| GND | 5 | 6 | Loss of load control. | B |
| OUT0 | 6 | 7 | Loss of load control, false faults are potentially detected. | B |
| OUT2 | 7 | 8 | Loss of load control. | B |
| GND | 8 | 9 | Loss of load control. | B |
| OUT4 | 9 | 10 | False faults are potentially detected. | B |
| NC | 10 | 11 | No impact to device functionality. | D |
| NC | 11 | 12 | False faults are potentially detected. | B |
| OUT6 | 12 | 13 | Loss of load control, false faults are potentially detected. | B |
| OUT7 | 13 | 14 | False faults are potentially detected. | B |
| NC | 14 | 15 | No impact to device functionality. | D |
|
NC |
15 | 16 | False faults are potentially detected. | B |
| OUT5 | 16 | 17 | Loss of load control. | B |
| GND | 17 | 18 | Loss of load control. | B |
| OUT3 | 18 | 19 | Loss of load control, false faults are potentially detected. | B |
| OUT1 | 19 | 20 | Loss of load control, false faults are potentially detected. | B |
| VM | 20 | 21 | False faults are potentially detected. | B |
| nSLEEP | 21 | 22 | Loss of load control. | B |
| IN1 | 22 | 23 | Loss of load control. | B |
| IN0 | 23 | 24 | Loss of load control. | B |
| VDD | 24 | 1 | SPI communication is nonfunctional. | B |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to Supply
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| nSCS | 1 | Low voltage pin maximum voltage is violated. | A |
| SCLK | 2 | Low voltage pin maximum voltage is violated. | A |
| SDI | 3 | Low voltage pin maximum voltage is violated. | A |
| SDO | 4 | Low voltage pin maximum voltage is violated. | A |
| GND | 5 | VM undervoltage warning. | B |
| OUT0 | 6 | Loss of load control, false faults are potentially detected. | B |
| OUT2 | 7 | Loss of load control, false faults are potentially detected. | B |
| GND | 8 | VM undervoltage warning. | B |
| OUT4 | 9 | Loss of load control, false faults are potentially detected. | B |
| NC | 10 | No impact to device functionality. | D |
| NC | 11 | No impact to device functionality. | D |
| OUT6 | 12 | Loss of load control, false faults are potentially detected | B |
| OUT7 | 13 | Loss of load control, false faults are potentially detected. | B |
| NC | 14 | No impact to device functionality. | D |
| NC | 15 | No impact to device functionality. | D |
| OUT5 | 16 | Loss of load control, false faults are potentially detected. | B |
| GND | 17 | VM undervoltage warning. | B |
| OUT3 | 18 | Loss of load control, false faults are potentially detected. | B |
| OUT1 | 19 | Loss of load control, false faults are potentially detected. | B |
| VM | 20 | Intended operation. | D |
| nSLEEP | 21 | No impact to functionality. | D |
| IN1 | 22 | Low voltage pin maximum voltage is violated. | A |
| IN0 | 23 | Low voltage pin maximum voltage is violated. | A |
| VDD | 24 | Low voltage pin maximum voltage is violated. | A |