SFFSA21 October 2025 LM5190-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the LM5190-Q1 and LM25190-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to VIN (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the LM5190-Q1 and LM25190-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the LM5190-Q1 and LM25190-Q1 datasheets.
Figure 4-1 Pin Diagram| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| ISET | 1 | VOUT = 0V. The ISET pin is not functional. | B |
| RT | 2 | The output voltage attempts to regulate at maximum FSW, causing maximum power dissipation. | C |
| COMP | 3 | VOUT = 0V. | B |
| FB | 4 | The target of the output voltage is set to 5V. | B |
| AGND | 5 | The AGND pin is GND. VOUT = VOUT is as expected. | D |
| IMON/ILIM | 6 | VOUT = VOUT is as expected. The current monitor and CC limit are not functional. | B |
| VCC | 7 | VOUT = 0V, the device does not switch, the output of the VCC pin is loaded. | B |
| PGND | 8 | The PGND pin is GND. VOUT = VOUT is as expected. | D |
| LO | 9 | VOUT = 0V, the internal VCC regulator is loaded to current limit. | B |
| VIN | 10 | VOUT = 0V. | B |
| HO | 11 | VOUT = 0V, the internal VCC regulator is loaded to current limit. | B |
| SW | 12 | VOUT = 0V. The high-side FET is shorted from the VIN pin to GND. | A |
| CBOOT | 13 | VOUT = 0V. The high-side FET is shorted from the VIN pin to GND. | B |
| BIAS | 14 | VOUT = VOUT is as expected. The internal VCC regulator provides bias voltage. | C |
| PGOOD | 15 | VOUT = VOUT is as expected. The PGOOD pin is not functional. | C |
| FPWM/SYNC | 16 | VOUT = VOUT is as expected. There is no synchronization available and the device is always in PFM mode. | C |
| EN | 17 | VOUT = 0V. The device is always in shutdown. | B |
| ISNS+ | 18 | VOUT = 0V. | A |
| VOUT | 19 | VOUT = 0V. | B |
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| ISET | 1 | VOUT = VOUT is as expected. The ISET pin is not functional. | C |
| RT | 2 | The RT pin regulates to 1V, but the internal oscillator does not function. | B |
| COMP | 3 | The output voltage oscillates. | A |
| FB | 4 | VOUT = VIN. | A |
| AGND | 5 | The output voltage is indeterminate. | B |
| IMON/ILIM | 6 | VOUT = 0V. The current monitor and CC limit are not functional. | B |
| VCC | 7 | VOUT = 0V. | B |
| PGND | 8 | VOUT = 0V. | B |
| LO | 9 | VOUT = VOUT is as expected but with reduced efficiency. | C |
| VIN | 10 | VOUT = 0V. | B |
| HO | 11 | If the HO pin is opened while the HO pin has voltage to the SW pin, the high-side FET never turns off. VOUT = VIN. | A |
| SW | 12 | The output voltage is indeterminate. The floating rail of the CBOOT pin has no reference to the actual node of the SW pin. VOUT = VIN. | A |
| CBOOT | 13 | VOUT = 0V. | B |
| BIAS | 14 | VOUT = VOUT is as expected. The internal VCC regulator provides bias voltage. | C |
| PGOOD | 15 | VOUT = VOUT is as expected. The PGOOD pin is not functional. | C |
| FPWM/SYNC | 16 | VOUT = VOUT is as expected. There is no synchronization available and the device is always in FPWM mode. | C |
| EN | 17 | VOUT = 0V. | B |
| ISNS+ | 18 | The open ISNS+ pin blocks current limit and causes the output voltage to oscillate. | A |
| VOUT | 19 | VOUT = 0V, if the internal feedback is used. | B |
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| ISET | 1 | RT |
If the resistor of the RT pin is tied to the VCC pin, the ISET pin can be damaged. If the resistor of the RT pin is tied to the AGND pin, VOUT = VOUT is as expected. The switching frequency is lower. The CC operation is affected. |
A |
| RT | 2 | COMP |
If the resistor of the RT pin is tied to the VCC pin, the COMP pin can be damaged. If the resistor of the RT pin is tied to the AGND pin, VOUT = 0V. |
A |
| COMP | 3 | FB | External FB mode: The COMP pin regulates to 0.8V and the output is unregulated. VOUT = indeterminate. | B |
| Internal FB mode FB = VCC, there is damage to the device. | A | |||
| Internal FB mode FB = GND, VOUT = 0V. | B | |||
| FB | 4 | AGND | The target of the output voltage is set to 5V. | B |
| AGND | 5 | IMON/ILIM | VOUT = VOUT is as expected. The current monitor and CC limit are not functional. | C |
| IMON/ILIM | 6 | VCC | There is damage to the device. | A |
| VCC | 7 | PGND | The VCC pin is grounded. VOUT = 0V. | B |
| PGND | 8 | LO | VOUT = 0V. The VCC pin is loaded by the LO driver. | B |
| LO | 9 | VIN | VOUT = 0V. The driver is damaged if VIN > 8V. | A |
| VIN | 10 | HO |
For VIN > 8V, the pin exceeds the maximum ratings and the HO pin is damaged. For VIN < 8V, VOUT = dropout is lower than the VIN pin voltage, no switching, and there is excess current from the VIN pin. |
A |
| HO | 11 | SW | VOUT = 0V. | B |
| SW | 12 | CBOOT | VOUT = 0V. | B |
| CBOOT | 13 | BIAS | There is damage to the device if CBOOT > 30V. | A |
| BIAS | 14 | PGOOD | The pulldown of the PG pin can be damaged. VOUT = VOUT is as expected. | A |
| PGOOD | 15 | FPWM/SYNC |
VOUT = VOUT is as expected. If the FPWM pin is tied to the VCC pin, the pulldown of the PG pin can be damaged. |
A |
| FPWM/SYNC | 16 | EN | VOUT = VOUT is as expected. | A |
| EN | 17 | ISNS+ | The EN pin is high-voltage rated. VOUT = VOUT is as expected if VOUT > 1V. If VOUT < 1V, the device is disabled. | B |
| ISNS+ | 18 | VOUT |
The current limit is disabled since the current limit resistor is shorted. The output voltage cannot regulate since current-mode feedback is shorted. |
A |
| VOUT | 19 | ISET |
VOUT = 0V. If prebias VOUT > 5.5V, the ISET pin is damaged. |
A |
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| ISET | 1 | There is damage to the device if VIN > 5.5V. | A |
| RT | 2 | There is damage to the device if VIN > 8V. | A |
| COMP | 3 |
There is damage to the device if VIN > 5.5V If VIN < 5.5V, the output voltage is out of regulation. |
A |
| FB | 4 |
There is damage to the device if VIN > 8V. If VIN < 8V, VOUT = VIN is as expected. |
A |
| AGND | 5 | VOUT = 0V. | B |
| IMON/ILIM | 6 | There is damage to the device if VIN > 5.5V. | A |
| VCC | 7 |
There is damage to the device if VIN > 8V. If VIN < 8V, VOUT = VOUT is as expected. |
A |
| PGND | 8 | VOUT = 0V. | B |
| LO | 9 | VOUT = 0V. The driver is damaged if VIN > 8V. | A |
| VIN | 10 | N/A | D |
| HO | 11 |
For VIN > 8V, the pin exceeds the maximum ratings and the HO pin is damaged. For VIN < 8V, VOUT = dropout is lower than the VIN pin, there is no switching, and there is excess current from the VIN pin. |
A |
| SW | 12 | VOUT = VIN, there is excess current from the VIN pin. The LO pin turns on and shorts against the VIN pin. | B |
| CBOOT | 13 |
There is damage to the device if VIN > 8V. If VIN < 8V, VOUT < the output voltage target. |
A |
| BIAS | 14 | There is damage to the device if VIN > 30V. | A |
| PGOOD | 15 | There is damage to the device. | A |
| FPWM/SYNC | 16 |
There is damage to the device if VIN > 8V. If VIN < 8V, VOUT = VOUT is as expected, but the device is always in FPWM mode. |
A |
| EN | 17 | The device is always on. VOUT = VOUT is as expected. | C |
| ISNS+ | 18 | There is damage to the device. | A |
| VOUT | 19 | VOUT = VIN. | B |