SFFS992 September 2024 LMR51603-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LMR51603-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to ground (see Table 4-2)
Pin open-circuited (see Table 4-3)
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to VIN (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality.
B	No device damage, but loss of functionality.
C	No device damage, but performance degradation.
D	No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Device used within the Recommended Operating Conditions and the Absolute Maximum Ratings found in the appropriate device data sheet.
Configuration is as shown in the Example Application Circuit found in the appropriate device data sheet.

Figure 4-1 shows the LMR51603-Q1 pin diagram for the SOT-23 package. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the appropriate device data sheet.

Figure 4-1 Pin Diagram

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No.	Description of Potential Failure Effects	Failure Effect Class
CB	1	No output voltage.	B
GND	2	Normal operation.	D
FB	3	The regulator operates at maximum duty cycle. Output voltage rises approximately to the input voltage (VIN) level. Damage to customer load and output stage components are possible. No effect on device.	B
EN	4	Loss of ENABLE functionality. Device remains in shutdown mode.	B
VIN	5	Device does not operate. No output voltage is generated. Output capacitors discharge through the input short. A large current reversal can damage the device.	A
SW	6	Damage to internal FET.	A

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No.	Description of Potential Failure Effects	Failure Effect Class
CB	1	No output voltage.	B
GND	2	VOUT can be abnormal due to switching noise on analog circuits.	B
FB	3	VOUT is higher than the programmed output voltage.	B
EN	4	Loss of ENABLE functionality. Erratic operation; loss of regulation is probable.	B
VIN	5	No output voltage.	B
SW	6	No output voltage.	B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No.	Shorted to	Description of Potential Failure Effects	Failure Effect Class
CB	1	GND	No output voltage.	A
GND	2	FB	The regulator operates at maximum duty cycle. Output voltage rises approximately to the input voltage (VIN) level. Damage to customer load and output stage components are possible. No effect on device.	B
FB	3	GND	The regulator operates at maximum duty cycle. Output voltage rises approximately to the input voltage (VIN) level. Damage to customer load and output stage components are possible. No effect on device.	B
EN	4	VIN	No damage to device. Loss of ENABLE functionality.	B
VIN	5	SW	Damage to internal FET.	A
SW	6	VIN	Damage to internal FET.	A

Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN

Pin Name	Pin No.	Description of Potential Failure Effects	Failure Effect Class
CB	1	No output voltage. CBOOT ESD clamp runs current to destruction.	A
GND	2	No output voltage. Damage to other pins referred to GND.	A
FB	3	If VIN exceeds 5.5V, damage occurs. No output voltage.	A
EN	4	No damage to device. Loss of ENABLE functionality.	B
VIN	5	No effect.	D
SW	6	Damage to low side MOSFET.	A