SFFS958 July 2024 TPS62914-Q1 , TPS62916-Q1 , TPS62918-Q1
3 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the TPS6291x-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 3-2)
- Pin open-circuited (see Table 3-3)
- Pin short-circuited to an adjacent pin (see Table 3-4)
- Pin short-circuited to VIN (see Table 3-5)
Table 3-2 through Table 3-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 3-1.
Table 3-1 TI Classification of Failure
Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 3-1 shows the TPS6291x-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS6291x-Q1 data sheet.
Figure 3-1 Pin Diagram
Following is the assumption of use and the device configuration assumed for the pin FMA in this section:
- The device is operating in one of the typical application configurations show in Figure 3-2.
Figure 3-2 Typical Schematic
Table 3-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| PSNS | 1 | Intended pin connection. | D |
| NR/SS | 2 | The device does not power on. | B |
| FB | 3 | Loss of output voltage regulation. Output voltage goes to Vin. Device damage is possible.(1) Absolute maximum voltage can be exceeded. | A |
| VO | 4 | Loss of output voltage. | B |
| PG | 5 | Loss of PG functionality. | C |
| S-CONF | 6 | The device runs at 1MHz fSW, spread spectrum off, output discharge off, sync disabled.(2) | C (2) |
| EN/SYNC | 7 | The device does not power on for both EN and SYNC functions. | B |
| VIN | 8, 12 | The device does not power on. | B |
| PGND | 9, 11 | Intended pin connection. | D |
| SW | 10, 13 | Device damage is possible. | A |
| BOOT | 14 | Device damage is possible. | A |
Table 3-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| PSNS | 1 | Device damage is possible. | A |
| NR/SS | 2 | Allowable pin condition. Soft-start time is minimized. Minimum noise filtering. | D |
| FB | 3 | Loss of output voltage regulation. Output voltage goes to Vin. Device damage is possible.(1) Absolute maximum voltage can be exceeded. | A |
| VO | 4 | Open loop operation. Undetermined output voltage behavior. | B |
| PG | 5 | Loss of PG functionality. | C |
| S-CONF | 6 | The device runs at 2.2Mhz fSW, spread spectrum random, output discharge on, sync disabled.(2) | C |
| EN/SYNC | 7 | The device does not power on for both EN and SYNC functions. | B |
| VIN | 8, 12 | The device does not power on. | B |
| PGND | 9, 11 | Device damage is possible. | A |
| SW | 10, 13 | Loss of output voltage regulation. | B |
| BOOT | 14 | Loss of output voltage regulation. | B |
Table 3-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| PSNS | 1 | NR/SS | The device does not power on. | B |
| NR/SS | 2 | FB | Loss of output voltage regulation. | B |
| FB | 3 | VO | Loss of output voltage regulation. | B |
| VO | 4 | PG | Loss of output voltage regulation. Device damage is possible.(1) Absolute maximum voltage can be exceeded if PG is connected to VIN through a resistor. | A |
| PG | 5 | S-CONF | The device operating mode is indeterminate. (2) | C (2) |
| S-CONF | 6 | EN/SYNC | The device operating mode is indeterminate. (2) | C (2) |
| EN/SYNC | 7 | VIN | The device cannot be disabled. If using SYNC functionality, loss of output voltage regulation occurs. | B |
| VIN | 8 | PGND | Device damage is possible. | A |
| PGND | 9 | SW | Device damage is possible. | A |
| SW | 10 | PGND | Device damage is possible. | A |
| PGND | 11 | VIN | Device damage is possible. | A |
| VIN | 12 | SW | Device damage is possible. | A |
| SW | 13 | BOOT | Device damage is possible. | A |
| BOOT | 14 | PSNS | Device damage is possible. | A |
Table 3-5 Pin FMA for Device Pins
Short-Circuited to VIN
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| PSNS | 1 | Device damage is possible. | A |
| NR/SS | 2 | Device damage is possible.(1) Absolute maximum voltage can be exceeded. | A |
| FB | 3 | Loss of output voltage regulation. Output voltage goes to Vin. Device damage is possible.(1) Absolute maximum voltage can be exceeded. | A |
| VO | 4 | Device damage is possible.(1) Absolute maximum voltage can be exceeded. | A |
| PG | 5 | Device damage is possible. Absolute maximum current rating for the pin can be exceeded. | A |
| S-CONF | 6 | The device runs at 2.2MHz fSW, spread spectrum off, output discharge off, sync disabled.(2) | D (2) |
| EN/SYNC | 7 | The device cannot be disabled. If using SYNC functionality, loss of output voltage regulation occurs. | B |
| VIN | 8, 12 | Intended pin connection. | D |
| PGND | 9, 11 | Device damage is possible. | A |
| SW | 10, 13 | Device damage is possible. | A |
| BOOT | 14 | Device damage is possible. | A |
(1) Damage occurs if VIN is
greater than the 6V absolute maximum rating for the pin.
(2) Assumes pin FMA condition occurs prior to
device being enabled. If Pin FMA condition occurs after the device is operating, the
device continues operating as previously configured.